Yikes!!! New 200Mhz Intel P6 Benchmarks
Mike Zulauf
Glue) wrote:
> All that being said, keep in mind right now the 512k L 1.5 version of
> the Pro at 200mhz is close to _$2000_. I fail to see why this spells
> doom for the PPC consortium when even faster Alpha's have been
> available for relatively the same price. The 150mhz P6, perhaps, but
> the 604E will just about match it. I think it will continue to be
> bussiness as usual, Intel having the greater market share, and Apple
> and PPC consortium selling as many as they can, and perhaps more when
> the clones arrive.
I pretty much agree with you here. It has been somewhat surprising to me
just how much Intel has been able to squeeze out of the old x86, but I
don't think that the P6 is by any means the death knell for the PPC
family. Particularly with the prices they're released at (ie the
cheapest, P6-150 at $974).
Mike
--
Mike Zulauf
mazu...@atmos.met.utah.edu
Mike Zulauf
Glue) wrote:
> Hold on a second here- you use the non-Ppro optimized 32-bit NT
> benchmarks and compared them to application increases of 1.5 to 2X for
> 604 "optimized" _applications_?
I agree this may not be 'fair' if you are talking about the chips's
'potential', but there _are_ (some) 604 optimized apps shipping now, and
reportedly more on the way. It's true that they're not MS Word and Excel,
but if that's mainly what you use then you're probably better off with an
Intel system anyway. I really doubt we'll be seeing too many P6 optimized
applications for a while. The developers seem to be busy enough getting
32-bit and P5 optimized applications out the door.
> Infoworld reported increases of 50% generally for the_150_mhz IBM
> _system_ (not the Intel, and not the fastest P6 system), and up to
> 107% over the P-133 for high-end engineering apps. Tests in Photoshop
> on PC magazine showed increases of over 100% on some filters for a
> P6-150 on soon-to-be shipping systems. P6-optimized code is reported
> to make a difference- how significant is in question, but from the
> conversations here I garnered that it will at least be worth it. So
> apparently, the NT benchmark may not exactly be accurate for existing
> apps, and certainly not accurate for P6-optimized apps in the future.
What do you mean not accurate? That's what the results apparently are for
the given applications, that is MS Word, MS Excel, Welcom Software
Technology Texim Project, Orcad MaxEDA, and Microsoft PowerPoint
(16-bit). It's actually somewhat striking that they all show relatively
similar speedups. Also from what I understand these benchmarks include a
number of tests - not merely one or two functions of a program. I can
easily believe 100% speedup for 'some filters' on a P6-150; what I doubt
is that you see that much speedup for the program in general.
Lawson English
the new P6 benchmarks don't look so promising for PowerPC.
I've included older benchmarks from the SPECtable so that folks can
compare the effect of the new Intel C compiler version 2.2 on the P5-133
benchmarks and extrapolate from there.
While such benchmarks CAN be misleading, it appears that AIM have
seriously underestimated the potential of the P6 for 32-bit applications.
In comparison, the highest IBM benchmark for a 604-133 with 512K L2 cache is
SPECint92 176
SPECint92 154
SPECint95 4.07
SPECint95 3.27
Unless the 604e REALLY ramps up the speed and unless the differential
between desktop apps and SPEC scores is HUGE, AIM are in ***SERIOUS***
trouble. Even allowing for a 10% increase in speed from a new compiler,
and a 10% increase in speed from the larger L1 cache of the 604e and NO
loss in scaling as the speed increases, we see the 200mhz 604e with 512K
L2 cache on a 66mhz data bus as:
1.1x1.1x 200/133 x 176 = 320, which is 13% slower than the 200mhz P6,
which isn't using the 512K cache like the P6-166 is.
In fact, the 200mhz P6 with 512K internal L1.5 cache could conceivably
reach SPECint92 of ~400 which would make the BEST CASE projection for a
200Mhz 604e about 20% slower than the P6-200 with 512K L1.5 cache.
GADS! The ONLY saving grace for the PowerPC looks to be availability of the
P6 at higher speeds.
Note: the P6-150 is using the older process (.6 micron) while the P6-166,
180 and 200 all use the .35 micron process. The P6-166 uses 512K of
"L1.5" cache while the rest are using 256K of "L1.5" cache. No external
cache used.
From www.intel.com:
++++++++++++++++++++++++++++++++++++++
Pentium(R) Pro Processor Systems
SPEC95 Pentium(R) Pro Processor
200MHz 180MHz 166MHz 150MHz
System Alder Alder Alder Alder
L2 Cache 256K 256K 512K 256K
SPECint95 8.09 7.29 7.11 6.08
SPECfp95 6.70 6.10 6.21 5.42
Results measured on Intel Alder systems.
Pentium(R) Processor 1MB L2 Cache Systems
SPEC95 Pentium(R) Processor
133MHz 120MHz
SPECint95 4.14 3.72
SPECfp95 3.12 2.81
Results measured on an Intel XXpress system.
Pentium(R) Processor 512K L2 Cache Systems
SPEC95 Pentium(R) Processor
133MHz 120MHz
SPECint95 3.90 3.53
SPECfp95 3.27 2.92
Results measured on a Dell Dimension XPS system.
+++++++++++++++++++
SPECint95 3.68
SPECfp95 3.04
Older 512K P-133 XXPress benchmark
+++++++++++++++++++
Pentium(R) Pro Processor Systems
SPEC92 Pentium(R) Pro Processor
200MHz 180MHz 166MHz 150MHz
System Alder Alder Alder Alder
L2 Cache 256K 256K 512K 256K
SPECint92 366.0 327.4 327.1 276.3
SPECfp92 283.2 254.6 261.3 220.0
Results measured on Intel Alder systems.
Pentium(R) Processor 1MB L2 Cache Systems
SPEC92 Pentium(R) Processor
133MHz 120MHz
SPECint92 190.9 172.2
SPECfp92 120.6 108.4
Results measured on an Intel XXpress system.
Pentium(R) Processor 512K L2 Cache Systems
SPEC92 Pentium(R) Processor
133MHz 120MHz
SPECint92 177.9 160.7
SPECfp92 116.0 105.4
Results measured on a Dell Dimension XPS system.
++++++++++++++++++++++++++
SPECint92 147.5
SPECfp92 109.6
Older XXPRESS 512K benchmark
+++++++++++++++++++++++++++
++++++++++++++++++++++++++++
--
-------------------------------------------------------------------------------
Lawson English __ __ ____ ___ ___ ____
eng...@primenet.com /__)/__) / / / / /_ /\ / /_ /
/ / \ / / / / /__ / \/ /___ /
-------------------------------------------------------------------------------
Mike Zulauf
(Lawson English) wrote:
> Well, here they are. Even allowing for improvements in compiler quality,
> the new P6 benchmarks don't look so promising for PowerPC.
>
> I've included older benchmarks from the SPECtable so that folks can
> compare the effect of the new Intel C compiler version 2.2 on the P5-133
> benchmarks and extrapolate from there.
While I agree that these numbers are impressive, you also ought to look at
the NT 32-bit applications benchmarks. These show an approximately 100%
speedup for a P6-200 over a P5-133. Granted, these applications probably
haven't been optimized for the P6 (or maybe even the P5), but they are
indicative of what most users would see. Since, in general, application
speeds on a P5 are roughly comparable to a 601 at the same clock, you
could expect applications speeds on a P6-200 to be roughly twice as fast
as on a 601-133 (if there was such a beast).
One remaining question then is, how much of a speedup do you get for going
from a 601 to a 604? I've heard numbers of up to 1.5 to 2 times faster
for 604 optimized code, which _is_ being done for some commercial packages
already, and will certainly become more prevalent.
Thus, while I doubt that the high end Macs and Mac clones will be quite as
fast as a P6-200 in applications timings, I don't think they'll be too far
behind. Plus, it remains to be seen how common and affordable the P6-200
machines will be. By the time they are easily availabvle, the PPC will
possibly be able to make a better showing for itself.
Mike
----------------------------------------------------------------
from http://www.intel.com/procs/perf/highend/sysmarkNT.html
SYSmark/NT Pentium(R) Pro Processor
200MHz 180MHz 166MHz 150MHz
L2 Cache 256K 256K 512K 256K
Overall 648 596 590 509
Spreadsheet(rating) 557 530 542 460
Project Management(rating) 817 753 715 633
Word Processing(rating) 606 556 573 485
Presentation(rating) 691 623 623 534
CAD(rating) 598 542 515 454
SYSmark/NT Pentium(R) Processor
133MHz 120MHz
Overall 323 294
Spreadsheet(rating) 298 271
Project Management(rating) 286 257
Word Processing(rating) 335 312
Presentation(rating) 377 343
CAD(rating) 328 297
Pentium Pro Processor 200/180/166/150MHz numbers measured on Intel "Alder"
systems.
Pentium Processor numbers measured on Gateway systems.
--
Mike Zulauf
mazu...@atmos.met.utah.edu
David T. Wang
[expressed surprise about P6 performance numbers]
yes, all I can say is that it looks cool. Anyone notice that the
SpecInt95 numbers for the 200 MHz P6 is about the same as it is for the
333 MHz 21164 Dec Alpha? (the Alpha is about twice as fast in FP)
Hmmm, who was it that said that P6 will run about 130 SpecFP92?
hmmmm....... Maybe even Photoshop will be fast enough now :)
Can't wait to get my hands on one...
Dave Glue
Zulauf) wrote:
>One remaining question then is, how much of a speedup do you get for going
>from a 601 to a 604? I've heard numbers of up to 1.5 to 2 times faster
>for 604 optimized code, which _is_ being done for some commercial packages
>already, and will certainly become more prevalent.
Hold on a second here- you use the non-Ppro optimized 32-bit NT
benchmarks and compared them to application increases of 1.5 to 2X for
604 "optimized" _applications_?
Infoworld reported increases of 50% generally for the_150_mhz IBM
_system_ (not the Intel, and not the fastest P6 system), and up to
107% over the P-133 for high-end engineering apps. Tests in Photoshop
on PC magazine showed increases of over 100% on some filters for a
P6-150 on soon-to-be shipping systems. P6-optimized code is reported
to make a difference- how significant is in question, but from the
conversations here I garnered that it will at least be worth it. So
apparently, the NT benchmark may not exactly be accurate for existing
apps, and certainly not accurate for P6-optimized apps in the future.
>
>Thus, while I doubt that the high end Macs and Mac clones will be quite as
>fast as a P6-200 in applications timings, I don't think they'll be too far
>behind. Plus, it remains to be seen how common and affordable the P6-200
>machines will be. By the time they are easily availabvle, the PPC will
>possibly be able to make a better showing for itself.
>
This I agree. The hysteria on both camps never dies. This is Intel's
hour, PPC had their 604 hour, and they will likely have it again in
the near future, and we will continue to debate spec/byte/Photoshop/NT
benchmarks until our fingers bleed. But I take exception with the
comment that Intel is a "master" at the Spec "game"- they will try to
get the best score possible out of their system, like everyone else.
Notice one thing- the scores were all done with the P6's internal
(well, semi-internal cache), and no external. It probably wouldn't
make a great difference, but it would help somewhat to add an L3 (L 2
1/2? L2? whatever) cache if Intel really wanted to inflate the scores,
but they didn't do that. Intel's systems will always be the fastest
probably, but due to the design of the P6 and Intels motherboard
technology, I don't think we'll see the wide gap we saw between those
awfully-slow Neptune based systems and the Xpress in the Pentiums
early lifespan.
And hey, maybe we shouldn't be deriding the PPC consortium for having
failed, and congratulating Intel engineers on a job well done instead.
"Fame" for a chip engineer is fleeting in this business, slap 'em on
the back when you get the chance, because we'll be whining for the P7
to beat the latest PPC chip within a year. :)
Dave Glue
wrote:
>Well, here they are. Even allowing for improvements in compiler quality,
>the new P6 benchmarks don't look so promising for PowerPC.
To whoever you are: Posting under Lawsons name is not funny. Please
refrain from doing so.
(Anyone else think the above panicky post was quite bizarre
considering it came from Mr. English?)
Dave Ford
with a 256K cache is faster than a 300 Mhz Alpha 21164 with a 4 MB cache
on SPECint base95?
Pentium Pro: 8.09
Alpha 21164-300: 7.33
If this is true, then the Intel guys should get a big raise and go to
The Islands for a year. Everyone else should just throw down their swords!
Dave Ford
Doug Siebert
1. Megahertz really doesn't matter as much you might think. Check out the
SPEC results for an RS 6000 model 590 and model 990, especially on FP, and
wonder at how that's a 66 or 71.5MHz CPU (I think the H models are the
71.5MHz?) They beat Alpha 21064A's in FP, despite the 21064A being clocked
at 275MHz. If Intel really wanted to, they could probably do a re-release
of the 4004 (the first CPU they did) and make it go at several GHz if they
through all the resources at it they threw at the P6. But a limited 4 bit
CPU probably wouldn't be all that impressive running SPEC :-)
2. The 256K cache is well integrated with the chip. I'm not sure if there's
a wait state or there or not, but surely not more than 1 cycle delay. The
Alpha 21164 has L1 cache onchip of 8K, an L2 onchip of 96K (dunno if that has
a wait state or not, I suspect its probably the same as the P6's 256K
"L 1 1/2". The 4MB cache is an L3, but it is MUCH slower than the CPU, like
4-5 wait states away, at least.
There are others, these are probably the biggest though, IMHO.
And I think the Intel guys deserve a big raise for what they've done anyway,
its quite amazing how complex the P6 is that it really works (not having tried
divide on it yet, I guess we can't say its works 100% :-) ) I don't think
Intel wants them to go to the islands for a whole year though, they've been
working on the P7 since at least the beginning of the year (a guy I know was
hired to work on the P7 project, unfortunately, Intel has already brainwashed
him and he's not telling any juicy secrets!)
--
Doug Siebert || "Usenet is essentially Letters to the Editor
University of Iowa || without the editor. Editors don't appreciate
dsie...@icaen.uiowa.edu || this, for some reason." -- Larry Wall
(c) 1995 Doug Siebert. Redistribution via the Microsoft Network is prohibited.
Mike Schmit
writes:
>(well, semi-internal cache), and no external. It probably wouldn't
>make a great difference, but it would help somewhat to add an L3 (L 2
>1/2? L2? whatever) cache if Intel really wanted to inflate the scores,
>but they didn't do that.
I think it is generally required for a next level cache to be at least
4
times the size (or 8 or more times) to have much effect. This would
mean
that the P6 would really need a 2 or 4MB L3 cache to really show a
better benchmark score. While this is certainly possible, the cost
would
be way out of line for 99.9% of users.
Mike Schmit
-------------------------------------------------------------------
msc...@ix.netcom.com author:
408-244-6826 Pentium Processor Programming Tools
800-765-8086 ISBN: 0-12-627230-1
-------------------------------------------------------------------
Craig Koller
: All that being said, keep in mind right now the 512k L 1.5 version of
: the Pro at 200mhz is close to _$2000_. I fail to see why this spells
: doom for the PPC consortium ...
It undermines the fundamental promise of AIM, that the X86 was dying and
the PowerPC chip was rising (remember the superscientific graph?).
Although the P6 is somewhat of a hybrid monster, it still doesn't make
sense that a "dying" chip should be faster than a rising one. It's like
auto manufacturers making a few race cars. Sure it doesn't mean joe
sixpack will go that fast, but it lends credibility and notoriety to the
company.
Seeing that the 604 appears to be the zenith for a while, the P6 seems to
have successfuly leapfrogged the PowerPC. Even when the 604 was
released, Intel folk were feeding the rumor mill with this chip. What
does AIM have to offer? And remember, the onus is on them, given their
colossal marketing hype.
So which booths at Comdex will have the fastest chips? The ones with the
P6/200's. Ooooooh. Ahhhhhhh. Of course I think it's dumb, but AIM set
themselves up for this. With the apparent death of the 620, they should
leak some nifty news of the 630 pretty quick, or the 604evxyz.
Douglas Borsom
...
[A read 'em and weep list of P6 advantages over the PPC 604]
>GADS! The ONLY saving grace for the PowerPC looks to be availability of the
>P6 at higher speeds.
And price, perhaps.
-doug
David T. Wang
: On 1 Nov 1995 19:54:44 GMT, eng...@primenet.com (Lawson English)
: wrote:
: >Well, here they are. Even allowing for improvements in compiler quality,
: >the new P6 benchmarks don't look so promising for PowerPC.
: To whoever you are: Posting under Lawsons name is not funny. Please
: refrain from doing so.
: (Anyone else think the above panicky post was quite bizarre
: considering it came from Mr. English?)
: All that being said, keep in mind right now the 512k L 1.5 version of
: the Pro at 200mhz is close to _$2000_. I fail to see why this spells
: doom for the PPC consortium when even faster Alpha's have been
: available for relatively the same price. The 150mhz P6, perhaps, but
: the 604E will just about match it. I think it will continue to be
: bussiness as usual, Intel having the greater market share, and Apple
: and PPC consortium selling as many as they can, and perhaps more when
: the clones arrive.
I guess I would tend to agree. Apple won't disappear overnight, and it
still has a large and loyal following. While the PPC chips may not
provide an incentive for the X86 entrenched market to move over, the
introduction of the P6 doesn't mean that all the Mac people are just
going to move over either. Afterall, if Mac users happily defended
their 25 MHZ 040 machines when compared to 66MHz 486's. I don't see why
all the Mac users will all of a sudden give up defending their 150MHz
PPC604's against P6-XXX MHz's
What I see happening is that Apple will continue to hold on to that
segment of the market which it has always exceled in, but it will be a
part of the larger movement to consolidate. If I were to guess, I would
think that Apple encourage people to build CHRP boxes, then deemphasize
its hardware side, and concentrate more on its strength, which has
always been its OS and apps. So I think at least, Mac's will continue
to be everywhere for a good while, it's just that we may not recognize
them as such.
Mike Schmit
writes:
>
>In article <ckollerD...@netcom.com> Craig Koller,
>cko...@netcom.com writes:
>>It undermines the fundamental promise of AIM, that the X86 was dying and
>>the PowerPC chip was rising (remember the superscientific graph?).
>
>the first x86 cpu to break down on existing software, requiring upgrades
>to all 32-bit code for performance increases, and according to Intel, it
>is the last "true" x86 cpu. The next versions will be VLIW or whatever
>and will require more recompiles to access the native modes of the cpu.
I think you missed a little here.
The Pentium Pro does not "break down" on existing software. It runs old
16-bit software just fine. It just doesn't run it at greater performance
at about the SAME clock speed as a Pentium.
The point of the new architecture in the PPro is that they CAN (and have)
increased the clock speed more quickly than they have on the Pentium and
486.
Re: VLIW.
This has still not been announced and/or verified. There have been
conflicting reports and Intel seems to be working on at least 2
different P7 projects.
>When all is said and done, if I upgrade to a P6 system, I will get
slower
>performance on most of my existing applications.
If you currently have a Pentium-133 and you only upgrade to a PPro-150.
Any other combination will likely yield a gain, even if only a small
one.
>This is a new experience
>for most PC users. In the past every new generation ran the apps the
user
>had at the time 1.5-2x faster than the prior cpu generation.
Not true. The Pentium-60 was not 1.5x-2x a 486DX4-100, unless the code
was Pentium optimized.
Dave Glue
Zulauf) wrote:
>What do you mean not accurate? That's what the results apparently are for
>the given applications, that is MS Word, MS Excel, Welcom Software
>Technology Texim Project, Orcad MaxEDA, and Microsoft PowerPoint
>(16-bit). It's actually somewhat striking that they all show relatively
>similar speedups. Also from what I understand these benchmarks include a
>number of tests - not merely one or two functions of a program. I can
>easily believe 100% speedup for 'some filters' on a P6-150; what I doubt
>is that you see that much speedup for the program in general.
Sorry, jumped the gun- glossed over the word "applications" before the
word "benchmarks", and assumed it was some esoteric NT benchmark.
However, look at your apps- Office apps, even a 16bit Powerpoint
version! The "200%" speedup thrown about for the 604 vs. 601 is
usually in comparison to high-level apps such as Photoshop- if we're
going to compare office applications, then it wouldn't make any sense
to go beyond a Pentium, which kicks a 604's butt in that area- and
where the P6 suffers as well. The P6 doesn't show a large gain with
Office apps, that much was likely a given beforehand. On apps that
feverishly use the processor however, it has shown to have a large
benefit.
Dave Glue
wrote:
>OK, could somebody explain to me in technical terms how a 200 Mhz Pentium
>with a 256K cache is faster than a 300 Mhz Alpha 21164 with a 4 MB cache
>on SPECint base95?
>
> Pentium Pro: 8.09
> Alpha 21164-300: 7.33
>
>If this is true, then the Intel guys should get a big raise and go to
>The Islands for a year. Everyone else should just throw down their swords!
Agreed on the vacation, but the Alpha's FP still is significantly
higher. That's the Alpha's market, not running really fast versions
of MS Office and Excel. The Pro might take some of the Alpha's
territory, but it's still the choice for Cad and modelling/rendering
packages under NT.
And DEC has a 500Specint92 processor apparently close to release.
Edmond
wrote:
> " " == Lawson English <eng...@primenet.com> writes:
>In article <478ja4$6...@nnrp3.news.primenet.com> eng...@primenet.com (Lawson English) writes:
>
>
>
> > Unless the 604e REALLY ramps up the speed and unless the differential
> > between desktop apps and SPEC scores is HUGE, AIM are in ***SERIOUS***
> > trouble. Even allowing for a 10% increase in speed from a new compiler,
> > and a 10% increase in speed from the larger L1 cache of the 604e and NO
> > loss in scaling as the speed increases, we see the 200mhz 604e with 512K
> > L2 cache on a 66mhz data bus as:
>
>feedback directed optimizations. In essence, if they let the compiler
>run long enough there should be no difference between the code it
>produces and the code that is produced by a fleet of top notch
>assembly programers. It would be interesting to see what a fleet of
>assembly programmer could do on the 604e. It seems intel is just the
>first to give us numbers using FDO for spec and they will probably not
>bear any resemblence to real world performance. I am still looking
>for a dirty decks version of spec to be run on the P6 to see what the
>real performance we will see is. I feel that on average the P6 at 150
>Mhz will show a 50-100% increase. Speaking of which, a 604e
>looks like it will have a cost to produce of around $100 dollars. I
>think it is safe to assume that the P6 won't hit these levels for
>quite some time. I wonder what the real cost of the new 60
>
>< impressive number deleted >
What a heck of a biased post. No one else optimizes the heck out of their
SPEC tests? Real world? What are you talking about? What does 6.08 and
5.6 or whatever have to do with anything? They are arbitrary numbers used
for comparisons. What you do is take those numbers and match them to the
other Intel optimized machines. That will give you the absolute
performance medium. 50 - 100% increase? Over what? A P133. Well,
according to the magazines that is true using programs optimized for lower
processors. I'd love to get a 100% application boost personally.
--------------------------------------------------------------------
Edmond Underwood
Computing & Network Services (University of Colorado)
E-mail: unde...@Colorado.Edu
Dave Glue
wrote:
>So which booths at Comdex will have the fastest chips? The ones with the
>P6/200's. Ooooooh. Ahhhhhhh. Of course I think it's dumb, but AIM set
>themselves up for this. With the apparent death of the 620, they should
>leak some nifty news of the 630 pretty quick, or the 604evxyz.
They already started a few weeks before the P6's launch- I think the
news is in the latest Macworld. No name (some cute code-name), but
for early 97 a 500-600 SpecInt92 PPC processor is planned.
jeff
wrote:
> From: jd-...@ta1.cs.uiuc.edu (Jim Wong)
> Newsgroups: comp.sys.powerpc,comp.sys.intel,comp.benchmarks
> Subject: Re: Yikes!!! New 200Mhz Intel P6 Benchmarks
> Date: 3 Nov 1995 10:20:42 GMT
> Organization: University of Illinois at Urbana
>
> "Brent K. Presley" <b...@acpub.duke.edu> writes:
>
> >Yeah, but by the end of Q4 of next year the P6 should be able to get 500
> >SpecInt92 easily. Just take the current SpecInt92 for the 200MHz P6 and
> >adjust the MHz upward until you get 500 or greater. x(MHz)/500 0/366
> >This solves out around 275 MHz. Rumor has it that Intel will be able to hit
> >300Mhz by end of next year. WOW!!!! (that's SpecInt92 of 549 just by ramping
>
> >up the MHz)
>
> Only if you make the (incorrect) assumption that performance scales
> linearly with clock rate.
> --
> Jim Wong (jd-...@uiuc.edu)
Spec numbers seem to scale pretty linearly-- maybe that's why they aren't necessarily such
good benchmarks. I for one find a fast disk subsystem (4GB SCSI, 7200RPM, 512k cache) to
make a HUGE real-world difference over stock EIDE and small SCSI drives.
And that goes for the video card too-- a VRAM card is *much* faster than a DRAM card,
leading to again, a huge real-world difference.
However, you can extrapolate the correct specInt and specFp speeds of Intel's Pentium
processors by using the ratings from the P5-66 and multiplying by the ratio of the clock
speed. Try it-- it works.
Edmond
>"Brent K. Presley" <b...@acpub.duke.edu> writes:
>
>>Yeah, but by the end of Q4 of next year the P6 should be able to get 500
>>SpecInt92 easily. Just take the current SpecInt92 for the 200MHz P6 and
>>This solves out around 275 MHz. Rumor has it that Intel will be able to hit
>>300Mhz by end of next year. WOW!!!! (that's SpecInt92 of 549 just by ramping
>>up the MHz)
>
>Only if you make the (incorrect) assumption that performance scales
>linearly with clock rate.
>--
>Jim Wong (jd-...@uiuc.edu)
They will be likely adding cache (on board and perhaps internal). In that
case, it could perform linearly or even better. It seems that on-board
caching has it's advantages when viewing the latest benchmark scores.
Dave Ford
Jeff and Dori Maggard <j...@dori.ultranet.com> wrote:
>df...@kalypso.cybercom.net (Dave Ford) wrote:
>
>>OK, could somebody explain to me in technical terms how a 200 Mhz Pentium
>>with a 256K cache is faster than a 300 Mhz Alpha 21164 with a 4 MB cache
>>on SPECint base95?
>
>> Pentium Pro: 8.09
>> Alpha 21164-300: 7.33
(...)
>If the 21164-333 numbers don't match the ~8 listed agove, then the
>21164A will handily win back the integer crown shortly. And,
>something I found interesting... the P6 has 3x as many core logic
>transistors as the 21164 (and 21164A). Also, as mentioned elsewhere,
>the FP numbers are 2x in the favor of the year old 21164.
(...)
OK, let's compare the 21164A-333 with the P6. A previous poster claimed
500 SPECint92 for this chip. If the P6 is 367 SPECint92 at 200 Mhz, then
the P6 should hit 500 SPECint92 at about 275 Mhz. At the same clock rate
of 333 Mhz, it's 611 SPECint 92, which is 20% faster than the 21164A-333.
I know this is integer performance and the Alpha still kicks butt on
Floating Point, but many applications don't use Floating Point. One very
important class is database applications.
The point is, the Alpha is generally regarded as the fastest CPU around.
After the P6 announcement, it can only make this claim for FP. The Pentium
is now the fastest integer CPU on the planet.
Dave Ford
Andrew Templeman
>
>
> They already started a few weeks before the P6's launch- I think the
> news is in the latest Macworld. No name (some cute code-name), but
> for early 97 a 500-600 SpecInt92 PPC processor is planned.
>
The table that was in macweek at the end of sept mentioned
Spring 96 604e @ 150 (Scirocco) specint92 = 250.
'97 614 @ 266 (Typhoon) specint92 = 500.
??? 630 @ 600 (Dino & Boxer) specint92 = 450 & 600
--
................................................................................
Name : Andrew Templeman Phone : 0151 336 3911 (ext 328)
Internet : a_tem...@morgns.demon.co.uk Morganite Thermal Ceramics Ltd's Vax
: an...@amtmtc.demon.co.uk My Mac @ Home
................................................................................
Andrew Templeman
> Well, here they are. Even allowing for improvements in compiler quality,
> the new P6 benchmarks don't look so promising for PowerPC.
>
> compare the effect of the new Intel C compiler version 2.2 on the P5-133
> benchmarks and extrapolate from there.
>
The new compiler seems to make quite a difference
P133 was ~155 now 190 -> x 1.226
initial PPro 150 was estimated at 225 announced at 276 -> x 1.226
all of a sudden a Dell XPS133 is faster than the 604-133 IBM and
Macs. Why don't the other benchmarks agree: Byte, Mathematica and other
applications?
Even so a 200Mhz PPro is a fine achievement, with or without the
extra 22% the new compiler affords.
What is the new technology used. I've seen mention of 'Feedback'.
Jeffrey Reilly
>
>From the full discloser on intels web page, the new compiler does
>feedback directed optimizations. In essence, if they let the compiler
>run long enough there should be no difference between the code it
>produces and the code that is produced by a fleet of top notch
>assembly programers.
Hmmmm... some observations and additional pieces of information:
- Other vendors also use feedback directed optimization for various SPEC
results (i.e. - DEC, HP, IBM). Check out issues of the SPEC NEwsletter
or http://performance.netlib.org/performance/html/spec.html.
Intel explicitly documents it instead of referring users to the
compiler manual to define the flags.
- Feedback directed optimization (as defined by SPEC) is the process of:
- Compiling a program and inserting instrumentation.
- Running that program with a "sample" input (the "training" run).
- Gathering statistics from the instrumentation.
- Compiling the program again using data gathered from those
specifics.
- SPEC has rules defining how to use feedback directed optimazation.
Specifically, they define a special "train" input (different from
the "reference" input that must be run for the final results) to
be used in generating the feedback statistics.
- Allowing feedback directed optimization was a item that was seriously
discussed withing SPEC. The conclusion was that this was an emerging
technology that should be accounted for, particularlyfor those who are
interested in compiling for performance.
My opinion:
- If the compiler can automatically generate code that is no
different then "the code that is produced by a fleet of top notch
assembly programers", I consider that a "good thing". The compiler
does all of the work and all of the programmers can go work on other things.
- Feedback directed optimization does take longer in time to compile
(essentially you compile twice).
>It seems intel is just the
>first to give us numbers using FDO for spec and they will probably not
>bear any resemblence to real world performance.
This is untrue; if I recall correctly, either HP or DEC were the first to
use feedback directed optimization on SPEC benchmarks.
Jeff
Associate Editor, SPEC Newsletter
Jeff Reilly | "There is something fascinating about
Intel Corporation | science. One gets such wholesale returns
jwre...@mipos2.intel.com | of conjecture out of such a trifling
(408) 765 - 5909 | investment of fact" - M. Twain
Disclaimed: Speaking only for myself, not my employer... use at your own risk
Michael Anderson
> 107% over the P-133 for high-end engineering apps. Tests in Photoshop
> on PC magazine showed increases of over 100% on some filters for a
> P6-150 on soon-to-be shipping systems.
And tests in Photoshop on 604's have shown increases on some filters of
100% over the 601 too, so what's your point? It doesn't mean that the
entire app. will run 100% faster.
jeff
S. Nelson) wrote:
>
> The p6 should leapfrog it, it came out this week and the 604 was released a
> long time ago. Kind of crazy to expect anything less.
>
It doesn't just leapfrog it-- it CLOBBERS it. That's what surprises me. There is *nothing*
currently in the PPC stable that comes even close to a P6-180 or a P6-200. Even the PPC 604e
166 isn't within shouting distance. As for current plans, there isn't anything announced in
'96 as of yet that will approach P6-200 performance. And Intel will be revving the clock
speeds of current P5 and P6 designs in '96 I'm sure.
So much for technical superiority, eh?
Edmond
>df...@kalypso.cybercom.net (Dave Ford) wrote:
>
>>OK, could somebody explain to me in technical terms how a 200 Mhz Pentium
>>with a 256K cache is faster than a 300 Mhz Alpha 21164 with a 4 MB cache
>>on SPECint base95?
>
>> Pentium Pro: 8.09
>> Alpha 21164-300: 7.33
>
>>The Islands for a year. Everyone else should just throw down their swords!
>
>their new chip. Truely an impressive achievement.
>
>And while the party roars, keep in mind that the 21164-300 has been
>shipping for a year.
>If the 21164-333 numbers don't match the ~8 listed agove, then the
>21164A will handily win back the integer crown shortly. And,
>something I found interesting... the P6 has 3x as many core logic
>transistors as the 21164 (and 21164A). Also, as mentioned elsewhere,
>the FP numbers are 2x in the favor of the year old 21164.
>
>
>
Keep in mind the cache difference. Measure SPECfp on an Alpha 21164
without the 4 MB cache. I bet it would be a lot close to the 6.x that the
P6 gets.
Jim Wong
Ian S. Nelson
>Dave Glue (dav...@interlog.com) wrote:
>: All that being said, keep in mind right now the 512k L 1.5 version of
>: the Pro at 200mhz is close to _$2000_. I fail to see why this spells
>: doom for the PPC consortium ...
>It undermines the fundamental promise of AIM, that the X86 was dying and
>the PowerPC chip was rising (remember the superscientific graph?).
>Although the P6 is somewhat of a hybrid monster, it still doesn't make
>sense that a "dying" chip should be faster than a rising one. It's like
>auto manufacturers making a few race cars. Sure it doesn't mean joe
>sixpack will go that fast, but it lends credibility and notoriety to the
>company.
Hasn't Intel themselves pretty much admitted that the x86 is on the way out?
With that HP deal and the rumors I've read about the p7 and p8 and then the
lack of 16bit performance on the P6, it looks to me like Intel is starting to
phase it out. I'm not claiming that Intel won't support x86 code for the next
few generations, but it looks to me like it is on the way out.
>Seeing that the 604 appears to be the zenith for a while, the P6 seems to
>have successfuly leapfrogged the PowerPC. Even when the 604 was
>released, Intel folk were feeding the rumor mill with this chip. What
>does AIM have to offer? And remember, the onus is on them, given their
>colossal marketing hype.
The p6 should leapfrog it, it came out this week and the 604 was released a
Lawson English
: In article <47ceie$9...@steel.interlog.com>, dav...@interlog.com (Dave Glue) writes:
: >
: >
: > They already started a few weeks before the P6's launch- I think the
: > news is in the latest Macworld. No name (some cute code-name), but
: > for early 97 a 500-600 SpecInt92 PPC processor is planned.
: >
: The table that was in macweek at the end of sept mentioned
: Spring 96 604e @ 150 (Scirocco) specint92 = 250.
Winter 95 P6/256 @ 150 SPECint92 = 276.
: '97 614 @ 266 (Typhoon) specint92 = 500.
Winter 95 P6/256 @ 180 SPECint92 = 320.
: ??? 630 @ 600 (Dino & Boxer) specint92 = 450 & 600
Winter 95 P6/256 @ 200 SPECint92 = 366.
1H 96 P6/512 @ 200 SPECint92 = 400
2H 96 P6/512 @ 300 SPECint92 ~ 600
Unless they can move that timetable up 6 months for the 604e and at least
6-12 months for the 614, AIM is out of it.
Completely on the high-end.
ANd given 4 quarters for the price of P6-150 systems to drop to the current
pricing of P5-100 systems, you'll see an Intel system with 2x the
performance of a PowerMac 604/132 being the *average* home purchase by next
Christmas.
Unless (hopefully) my pontificating is correct about how AIM are keeping
the current PPC offerings slow for the same reason that APple is keeping
current PowerMac pricing high (high demand/low availability), Apple will
be worse off in 1996 vs Windows xx speed-wise, then it was in 1993 before it
released the first PowerPC's (we're talking "easy to use" graphics/DTP
high-end desktops, not low-end PB/Performa machines, here).
And the ease-of-use factor no longer exists in most new computer buyers
eyes. The hype about Windows 95 has taken care of that (between the end
of summer and this time last year, I had 20 newbies call wanting
Mac tutoring -since the release of WIndows 95, I've had TWO calls).
If (IF) AIM can ramp up production of 604e's and 614's MUCH earlier than
they are talking now, the PowerPC and Apple may have a chance (remember
that most of Apple's profit comes from the middle/high-end, precisely
where Windows NT and P6 machines are targetted).
If (I'd love to be wrong here) AIM can NOT ramp up production, Apple and the
entire promise of PowerPC machines will go away, IMHO. Apple is the cash
cow for PowerPC and if they slip drastically in sales, the PowerPC will have
become a financial black hole for AIM.
--
-------------------------------------------------------------------------------
Lawson English __ __ ____ ___ ___ ____
eng...@primenet.com /__)/__) / / / / /_ /\ / /_ /
/ / \ / / / / /__ / \/ /___ /
-------------------------------------------------------------------------------
Tom L. Davis
(Dave Ford) wrote:
:OK, could somebody explain to me in technical terms how a 200 Mhz Pentium
:with a 256K cache is faster than a 300 Mhz Alpha 21164 with a 4 MB cache
:on SPECint base95?
:
: Pentium Pro: 8.09
: Alpha 21164-300: 7.33
:
:If this is true, then the Intel guys should get a big raise and go to
:The Islands for a year. Everyone else should just throw down their swords!
:
:Dave Ford
Doesn't quite seem right, does it? I'm kinda curious about this too.
Tom
Edmond
>In article <478ja4$6...@nnrp3.news.primenet.com>, eng...@primenet.com (Lawson English) writes:
>> Well, here they are. Even allowing for improvements in compiler quality,
>> the new P6 benchmarks don't look so promising for PowerPC.
>>
>> I've included older benchmarks from the SPECtable so that folks can
>> compare the effect of the new Intel C compiler version 2.2 on the P5-133
>> benchmarks and extrapolate from there.
>>
>
>The new compiler seems to make quite a difference
>
>P133 was ~155 now 190 -> x 1.226
>initial PPro 150 was estimated at 225 announced at 276 -> x 1.226
>
>all of a sudden a Dell XPS133 is faster than the 604-133 IBM and
>Macs. Why don't the other benchmarks agree: Byte, Mathematica and other
>applications?
>
>Even so a 200Mhz PPro is a fine achievement, with or without the
>extra 22% the new compiler affords.
>
>What is the new technology used. I've seen mention of 'Feedback'.
>
I've measured Mathematica and it seems relatively close between the two.
I'm not sure what went on with Byte. Other apps? Office apps show those
results. ;^) Optimization is obviously an important issue.
Patrick O'Neil
> >It undermines the fundamental promise of AIM, that the X86 was dying and
> >the PowerPC chip was rising (remember the superscientific graph?).
> [snip]
>
> However, if AIM were to produce a $2000 microprocessor, I'm confident that it would easily
> outperform a 200 MHz Pentium Pro.
Oh come on. Upon what do you base this conceit? Personal
emotional-based bias? In any case, I suggest you look at the cost of a
Micron P6-180 system that someone kindly posted in this group...and it is
available now, not next year.
And after IBM/Motorola threw a bunce of money at a chip to make it faster
than a P6, Intel could just as easily throw money at another chip to top
whatever IBM/Motorola made ad infinitum.
John Nagle
>It has been suggested that the Pentium Pro somehow represents
>the failure of RISC. I respectfully disagree. The Pentium Pro
>in fact represents the triumph of RISC. To understand why,
>one must first recognize that RISC is a matter of instruction
>set architecture--and not a matter of caches, pipelines,
>functional units operating in parallel, branch prediction,
>tomasulo scheduling, or any other sleight of circuitry.
...
>The performance of the Pentium Pro is due to the fact that its
>internal instruction set architecture is RISC, not CISC.
Actually, its internal instruction set is that of a 3-address
dataflow machine. The input x86 instructions get converted into
dataflow operations which have no implicit execution order, and all
those operations get dumped into the computational mill, which
has multiple copies of various types of ALU. After
execution, a section of the CPU does "retirement", which copies the
results out into the programmer-visible state. It's really a different
architecture from RISC. The head of the design team gave a talk at
Stanford on this a few weeks ago.
Incidentally, the variable-length instruction problem at the x86
level is handled by brute force; they just decode at all the possible
instruction starting points and throw out the results that aren't
needed once they find out which ones are real.
John Nagle
Mike Schmit
writes:
>It has been suggested that the Pentium Pro somehow represents
>the failure of RISC. I respectfully disagree. The Pentium Pro
>in fact represents the triumph of RISC. To understand why,
>one must first recognize that RISC is a matter of instruction
>set architecture--and not a matter of caches, pipelines,
>functional units operating in parallel, branch prediction,
>tomasulo scheduling, or any other sleight of circuitry.
>
>The RISC argument has always been that the instruction set
>architecture matters because it determines how easy it is to implement
>the circuitry required to make the CPU fast, and because it determines
>the effectiveness of the tools in the hardware designer's
>armamentarium. It also affects the ability of translators to produce
>optimal code.
>
>The performance of the Pentium Pro is due to the fact that its
>internal instruction set architecture is RISC, not CISC. It
>dynamically translates x86 CISC instructions into RISC instructions.
>Apparently, it takes less chip real estate to translate one instruction
>set into another than it would to make a fully native x86 CPU as fast
>as the Pentium Pro. That's pretty strong proof of the potential value
>of a RISC instruction set architecture!
>
>RISC has finally conquered all.
Actually, RISC is about more than that and one could easily
argue the opposite.
RISC os:
- fixed len instructions
- load/store architecture
- many registers (i.e. usually 32 or more)
- few addressing modes
All these things are/were to keep the design simple so that
instructions can execute in a single cycle and then other
techniques could be used to improve performance even more
using the transistors that were left over. i.e. piplining,
superscalar, big caches ...
Sure, the internals of the P6 may be somewhat RISC-like,
but the basic philosophy of RISC has already been severely
violated by having to use transistors to decode a non-fixed
length instruction stream with complex mem-op-mem instructions
with few registers and many addressing modes.
Alan Lovejoy
>
>love...@ix.netcom.com (Alan Lovejoy ) writes:
>>It has been suggested that the Pentium Pro somehow represents
>>the failure of RISC. I respectfully disagree. The Pentium Pro
>>in fact represents the triumph of RISC. To understand why,
>>one must first recognize that RISC is a matter of instruction
>>set architecture--and not a matter of caches, pipelines,
>>functional units operating in parallel, branch prediction,
>>tomasulo scheduling, or any other sleight of circuitry.
>>The performance of the Pentium Pro is due to the fact that its
>>internal instruction set architecture is RISC, not CISC.
>
>dataflow machine. The input x86 instructions get converted into
>dataflow operations which have no implicit execution order, and all
>those operations get dumped into the computational mill, which
>has multiple copies of various types of ALU. After
>execution, a section of the CPU does "retirement", which copies the
>results out into the programmer-visible state. It's really a
different
>architecture from RISC. The head of the design team gave a talk at
>Stanford on this a few weeks ago.
>
> Incidentally, the variable-length instruction problem at the x86
>level is handled by brute force; they just decode at all the possible
>instruction starting points and throw out the results that aren't
>needed once they find out which ones are real.
>
> John Nagle
But RISC is a design philosophy (or "design pattern") that seeks to
optimize performance by optimizing the instruction set architecture.
It does not specify or require any specific instruction set
architecture. The fact that the internal P6 ISA does not closely
resemble that of other RISC processors is irrelevant. The only
important point is that the performance of the P6 was made possible
within the transistor budget by optimizing the internal ISA. That's
what makes it a RISC.
Evan Torrie
>From the full discloser on intels web page, the new compiler does
>feedback directed optimizations. In essence, if they let the compiler
>run long enough there should be no difference between the code it
>produces and the code that is produced by a fleet of top notch
>assembly programers.
I think the really amazing thing which Intel has done is its compiler
work. I'm not sure who they've hired over the past few years, but
they've certainly got some of the hottest compiler technology in
that "Intel Reference Compiler". The compiler alone has improved
their Pentium SPECint92 benchmarks by about 50% since the original
Pentium 60 release.
--
------------------------------------------------------------------------------
<A HREF="http://liber.stanford.edu/~torrie/">Evan Torrie</A>.
Stanford University, Class of 199? tor...@cs.stanford.edu (finger for PGP)
"I do not myself feel that any person who is really profoundly humane can
believe in everlasting punishment" - Bertrand Russell.
Dave Glue
wrote:
>Hasn't Intel themselves pretty much admitted that the x86 is on the way out?
>With that HP deal and the rumors I've read about the p7 and p8 and then the
>lack of 16bit performance on the P6, it looks to me like Intel is starting to
>phase it out. I'm not claiming that Intel won't support x86 code for the next
>few generations, but it looks to me like it is on the way out.
It likely is, but the method in which it is dissapearing will likely
be different than what the PPC consortium is doing for compatibility
with older architectures (complete software emulation). The P7 may be
another X86 variant, but chips after that will likely be a combination
of hardware/software rendering. There will be a point where X86 speed
reaches a threshold, but from all reports it will keep a lot of people
satisfied until native P8 (?) software gains enough popularity that
Intel can compeltely dump the emulation and go full-bore.
As for "kind of crazy to expect anything less", because the P6 was
released after the 604- no, according to many PPC pundits, it would be
kind of crazy to expect _any_ X86 CPU to outperform a "clean" RISC
design. This is the reason for the hubub, with every new CPU and
Pentium-variant released by Intel the cry of "The X86 architecture has
hit it's limit! PPC will rocket forward!" is heard. This was
especially true up until weeks before the Ppro's introduction,
complete with bizarre theories on the Pro's Spec ratings- one such
individual even stated it would likely be around 115 for the 133mhz
model.
Dave Glue
wrote:
>Yeah, but by the end of Q4 of next year the P6 should be able to get 500
>SpecInt92 easily. Just take the current SpecInt92 for the 200MHz P6 and
>adjust the MHz upward until you get 500 or greater. x(MHz)/500=200/366
>This solves out around 275 MHz. Rumor has it that Intel will be able to hit
>300Mhz by end of next year. WOW!!!! (that's SpecInt92 of 549 just by ramping
>up the MHz)
Scaling completely for Mhz doesn't always work, but it could likely be
over 500. Of course, price is the issue. Actually, the prices of the
Pro aren't that bad considering how small the market is right now, 930
for the 150, 1200 for the 180 and 1300 for the 200. Certainly not
cheap, but they'll drop, Intel has more price cuts scheduled for
January.
They are charging a _huge_ premium for the 512k versions, however.
The 166mhz 512k version is over $1500, and it's results are about the
same as the 180mhz 256 version. Not much point for the desktop user,
but apparently the extra 256k L 1.5 cache helps in multiprocessing.
Dave Glue
>However, if AIM were to produce a $2000 microprocessor, I'm confident that it would easily
>outperform a 200 MHz Pentium Pro.
>
The $2000 price is for the 512k version, not expected to ship until
second quarter of 96. The current 256k version is around $1300.
Nicolas Gloy
OK, let's compare the 21164A-333 with the P6. A previous poster claimed
500 SPECint92 for this chip. If the P6 is 367 SPECint92 at 200 Mhz, then
the P6 should hit 500 SPECint92 at about 275 Mhz. At the same clock rate
of 333 Mhz, it's 611 SPECint 92, which is 20% faster than the 21164A-333.
[...]
The point is, the Alpha is generally regarded as the fastest CPU around.
After the P6 announcement, it can only make this claim for FP. The Pentium
is now the fastest integer CPU on the planet.
You overlook that it may not be possible for Intel to produce a P6
chip that runs at 275 or 333 MHz. This is much easier for a simple,
clean architecture such as Alpha, and much harder for the x86 instruction
set. That's why it is a considerable achievement for Intel to produce
the current P5 chips.
Besides, the only "applications" that scale linearly with clock speed
are the silly litte SPEC92 programs that fit almost entirely into the
usual 8KB I-cache.
-Nick
--
========================================================================
Nicolas Gloy Harvard University Division of Applied Sciences
n...@cs.harvard.edu Computer Architecture + Compilers
Dave Glue
Gloy) wrote:
>You overlook that it may not be possible for Intel to produce a P6
>chip that runs at 275 or 333 MHz.
Intel has already stated they plan to have a 300mhz P6 in late 96. I
would say that by evidence of the 200mhz model this soon, that that is
certainly reachable.
Matt Peterson
bar...@gonix.com (Marc N. Barrett) writes:
> PowerPC 604 | 133Mhz | 200 | now
> PowerPC 604e | 166Mhz | 225 | mid 1996
<snip>
>
>
> In other words, the 200Mhz Pentium Pro -- which will be available quite
> soon, if not already -- has a SpecInt92 rating MUCH higher than AIM's
> PowerPC 604e which won't be available until mid 1996 at least, and has a
Hmmm...don't you think that it is odd that the 604e, with its larger
cache and fast clock-rate, is only 12% faster than the 604?
I think you need to take their numbers and the recent p6 numbers with a
grain of salt.
Matt Peterson
University of Kansas, Experimental Psychology
Arun Gupta
While talking about the various chips, consider this : how many
people have actually bought PPC604s ? I believe Apple gained
market-share with 603s and 601s, and this because prices were
lowered to within what people were willing to pay for a brand-name.
Its not speed, nor technical superiority that seems to gain
marketshare, its price,price, price !
-arun gupta
David T. Wang
: df...@kalypso.cybercom.net (Dave Ford) writes:
: OK, let's compare the 21164A-333 with the P6. A previous poster claimed
: 500 SPECint92 for this chip. If the P6 is 367 SPECint92 at 200 Mhz, then
: the P6 should hit 500 SPECint92 at about 275 Mhz. At the same clock rate
: of 333 Mhz, it's 611 SPECint 92, which is 20% faster than the 21164A-333.
: [...]
: The point is, the Alpha is generally regarded as the fastest CPU around.
: After the P6 announcement, it can only make this claim for FP. The Pentium
: is now the fastest integer CPU on the planet.
: You overlook that it may not be possible for Intel to produce a P6
: chip that runs at 275 or 333 MHz. This is much easier for a simple,
Greg Connor
>cko...@netcom.com (Craig Koller) wrote:
>>Dave Glue (dav...@interlog.com) wrote:
>>
>>: All that being said, keep in mind right now the 512k L 1.5 version of
>>: the Pro at 200mhz is close to _$2000_. I fail to see why this spells
>>: doom for the PPC consortium ...
>>
>>It undermines the fundamental promise of AIM, that the X86 was dying and
>>the PowerPC chip was rising (remember the superscientific graph?).
>[snip]
>
>
>However, if AIM were to produce a $2000 microprocessor, I'm confident that it would easily
>outperform a 200 MHz Pentium Pro.
The SPECInt number of 366 is for the 256K P6-200 not the 512. The
P6-200 with 256K is priced at ~$1300 (in 1000 per lots). Its the
P6-200 with 512K that is ~$2000. Let's just keep the facts straight.
I know this is a tough time for some people who stuck their necks out
on this issue, but really.
-Greg
Mark Hahn
> >Anyway, I have a lot of questions about Intel's new compiler technology :
> >when will we see commercial products based on it ? Also, from whats been
> >posted here, it appears that the compiler analyzes performance, recompiles,
> >using feedback from perf. statistics from the first compile, etc. -- a most
> >impressive technology, but how well does it work on other-than-benchmark
> >programs ? I guess we'll have to wait and see.
no, we DON'T have to wait and see. first of all, profile-directed feedback
is _not_ the only reason the P6 is fast: PDF provides only a small boost,
in my experience.
and of course the components of the spec suites are REAL PROGRAMS!
they are _not_ synthetic benchmarks, but examples of programs that
you do run, like gcc. yes, if you spend all day in Word, spec isn't
representative, nor did it claim to represent a UI-based workload.
> I heard that this technology is only good for benchmarking. I have never
> heard of a commercial piece of software based on it. Have you?
of course. probably not in the very conservative PC world, but I
wouldn't be surprised of the Mathematica I run on my HP736 didn't
use HP's compiler and the -I switch (for PDF).
look folks, PDF is nothing magical, and it's certainly not the sole
reason that the P6 is showing up as so damned fast. PDF has been around
a long time - I think I first saw it on MIPS Rx000 compilers, circa
88 or so. PDF mostly just lets you predict branches a little better.
regards, mark hahn.
--
operator may differ from spokesperson. ha...@neurocog.lrdc.pitt.edu
http://neurocog.lrdc.pitt.edu/~hahn/
Arun Gupta
Mark Hahn <ha...@neurocog.lrdc.pitt.edu> wrote:
>
> [much deleted]
>
>look folks, PDF is nothing magical, and it's certainly not the sole
>reason that the P6 is showing up as so damned fast. PDF has been around
>a long time - I think I first saw it on MIPS Rx000 compilers, circa
>88 or so. PDF mostly just lets you predict branches a little better.
Whatever it is in the compiler, it appears to have boosted the performance
of the P5 as well. I haven't had a chance to check for myself, but it
was said here that the P5 went from 155 to 190 SPECint92. Incidentally,
the reported SPECint92 for the P6-150 MHz , 276 ~= 225 * 190/155
where 225 was the reported SPECint92 for the chip in July.
-arun gupta
Andrew Ayers
> look folks, PDF is nothing magical, and it's certainly not the sole
> reason that the P6 is showing up as so damned fast. PDF has been around
> a long time - I think I first saw it on MIPS Rx000 compilers, circa
> 88 or so. PDF mostly just lets you predict branches a little better.
Ah, but on a superscalar machine, int performance is in many cases
strongly tied to predicting branches just a little better. Also, PDF
is useful for other many things: guiding automatic inlining decisions,
determining if certain types of code motion are profitable, and
globally laying out routines and basic blocks to minimize i-cache
effects.
My understanding is that quite a few HP software products (including
at least one well-known database) make use of PDF, and see healthy
performance boosts. So the technology is real and is in use
commercially.
There has been considerable resistance in the past from software
developers to use optimization in production code: compilers have bugs
and expose bugs in user code, the resulting binary can't be easily
debugged and optimized binaries may not be backwards compatible, and
of course optimization flags and processes vary across platforms. I
think that these attitude will change somewhat as software vendors
come to appreciate the benefits of optimization, and as the number of
important target platforms and os's shrink.
-- Andy Ayers
[not an official statement from HP]
Edmond
>On 4 Nov 1995 17:19:55 GMT, Edmond <unde...@Colorado.Edu> wrote:
>
>
>>First off Matt, the 604 is at 176. Take those numbers verses the 220-225
>>that Motorola posts and it makes a lot of sense. Anyway, would doubling
>>the internal cache size really make a huge difference when comparing a
>>very memory-bound SPEC test?
>
>I think the early test of the 604 had it at 176, then IBM did some
>compiler optimizations (no, they cheated!), and it was around 190.
>
They never published anything though. Until they do, I have to go with
the 176 number. Here is IBM's web site and the information on their 43P
server.
HTTP://www.austin.ibm.com/hardware/43P/43P.html#topic11
Edmond
>In <47dq26$g...@ixnews4.ix.netcom.com> msc...@ix.netcom.com (Mike
>Schmit) writes:
>>
>>In <47cn94$6...@ixnews2.ix.netcom.com> love...@ix.netcom.com (Alan
>Lovejoy )
>>writes:
>>
>>>It has been suggested that the Pentium Pro somehow represents
>>>the failure of RISC. I respectfully disagree. The Pentium Pro
>>>in fact represents the triumph of RISC. To understand why,
>>>one must first recognize that RISC is a matter of instruction
>>>set architecture--and not a matter of caches, pipelines,
>>>functional units operating in parallel, branch prediction,
>>>tomasulo scheduling, or any other sleight of circuitry.
>>>
>>>architecture matters because it determines how easy it is to
>implement
>>>the circuitry required to make the CPU fast, and because it
>determines
>>>the effectiveness of the tools in the hardware designer's
>>>armamentarium. It also affects the ability of translators to produce
>>>optimal code.
>>>
>>>dynamically translates x86 CISC instructions into RISC instructions.
>>>Apparently, it takes less chip real estate to translate one
>instruction
>>>set into another than it would to make a fully native x86 CPU as fast
>
>>>as the Pentium Pro. That's pretty strong proof of the potential
>value
>>>of a RISC instruction set architecture!
>>>
>>>RISC has finally conquered all.
>>
>>Actually, RISC is about more than that and one could easily
>>argue the opposite.
>
>otherwise. Did you think I had?
>
>In order to argue the opposite convincingly, you would have to
>demonstrate a pure CISC cpu that could touch the fastest Alpha, MIPS or
>HP-PA processor. There is no such beast, as far as I am aware (and
>the P6 doesn't count because it has a RISC core).
>
Can a Micro-op really be considered a RISC instruction? What about
Cyrixes 6x86? If they ever get it on the .35u process, add caching, and
boost the clock, it could be in that performance range.
>>All these things are/were to keep the design simple so that
>>instructions can execute in a single cycle and then other
>>techniques could be used to improve performance even more
>>using the transistors that were left over. i.e. piplining,
>>superscalar, big caches ...
>
>"All these things" are the result of applying the RISC design
>philosophy, which can be expressed in abbreviated form as follows:
>reducing the "complexity" of the work required to execute each machine
>instruction makes it possible to construct a faster processor.
>
The P6 doesn't reduce the complexity, unless you think that 14-stage
pipeline is simplistic. Would you consider VLIW a RISC approach?
I'm not sure RISC-like is the correct word for the P6. RISC CPU's utilize
many of the technologies that the P6 does: branch prediction, out of
order execution, pipelining, etc., but that doesn't make it a RISC chip.
I'll have to keep reading up on the P6 to fully compare and contrast the
two designs.
Andrew Templeman
In article <DHJ0...@nntpa.cb.att.com>, Arun Gupta writes:
> Anyway, I have a lot of questions about Intel's new compiler technology :
> when will we see commercial products based on it ? Also, from whats been
> posted here, it appears that the compiler analyzes performance, recompiles,
> using feedback from perf. statistics from the first compile, etc. -- a most
> impressive technology, but how well does it work on other-than-benchmark
> programs ? I guess we'll have to wait and see. Considering that the P5
> is said to have its specint92 raised to 190 from 155 (again, that is what
> was posted in these groups), my sig. is relevant, I think.
Maybe AIM will be announcing new specmarks for the 604 soon at ~800 specint.
they're just waiting for the compilation to finish, the only started it
in june :-)))))
Andy
Edward Jung
>OK, let's compare the 21164A-333 with the P6. A previous poster claimed
>500 SPECint92 for this chip. If the P6 is 367 SPECint92 at 200 Mhz, then
>the P6 should hit 500 SPECint92 at about 275 Mhz. At the same clock rate
>of 333 Mhz, it's 611 SPECint 92, which is 20% faster than the 21164A-333.
The PPC, for example, focused early on getting alot of speed from
clever instruction processing at lower clock rates (legacy of the IBM
work on POWER), whereas DEC focused on upping the clock rate to
phenominal rates (at the risk of having off-chip memory MUCH slower
than the processor). As a result, the PPC doesn't scale to high clock
rates as easily as the Alpha.
Back in the early RISC days, there was quite a debate on whether the
"simpler" core instruction sets of RISC should be used PRIMARILY to
build more sophisticated parallel instruction manipulations on chip
(superscalar for SPARC, superpipelined for MIPS), more sophisticated
macro-instructions (POWER), or higher clock rates (Alpha). These days
everybody is doing a bit of everything.
I think the "fastest chip" shouldn't be measured by SPECint/clock, but
SPECint/chip (and, maybe soon, SPECS/multiprocessor chips). This is
because some chips are harder to scale up to high clock rates than
others due to complexity.
By this measure the Pentium Pro still seems to be below the Alpha
21164 @ 330MHz and the HP PA-RISC 8000. But it's close, which is a big
surprise to many. Intel deserves praise for what appears to be a great
engineering effort.
=== My Thoughts are my own ===
Edward Jung
Edward Jung
>It undermines the fundamental promise of AIM, that the X86 was dying and
>the PowerPC chip was rising (remember the superscientific graph?).
>Although the P6 is somewhat of a hybrid monster, it still doesn't make
>sense that a "dying" chip should be faster than a rising one. It's like
>auto manufacturers making a few race cars. Sure it doesn't mean joe
>sixpack will go that fast, but it lends credibility and notoriety to the
>company.
I never understood this graph. These days even price/performance
ratios are not a good way to compare the fastest lower-volume device
like PPC to the fastest high-volume Intel processor since the Intel
price can be lowered nearly arbitrarily (they are subsidized by the
volume of their highest volume devices and the economy of scale).
Price is business marketing, and the high-volume guy can always play
with that (in fact he can even *try* to cut prices to bleed everybody
else to death since he has more blood).
I always thought that the biggest advantage of AIM and their purer
RISC approach was performance/power consumption, i.e. in the low-power
arena. Power is physics, not business marketing. Nobody can play with
that. If you have a streamlined approach with fewer transistors, given
equal engineering and applications you can always beat the guy who's
carrying transistors for compatibility modes.
Intel recently also announced a low power PDA device based on the
486SX architecture. This is a better realm for the AIM guys to compare
to (if they chose to move aggressively into this low-power market).
Unfortunately for them, they are challenging the bully right in his
own playground... shows who has the smarter marketing, despite the $$$
AIM has spent.
Matt Peterson
Edmond <unde...@Colorado.Edu> writes:
> First off Matt, the 604 is at 176. Take those numbers verses the 220-225
> that Motorola posts and it makes a lot of sense. Anyway, would doubling
> the internal cache size really make a huge difference when comparing a
> very memory-bound SPEC test?
Just curious, but I thought that Spec tested *systems* not processors.
Also, I assume that since Spec includes gcc as one of its apps, and
compilers tend to be rather disk intensive, that Spec is also measuring
disk i/o.
Exactly how valid is Spec series of benchmarks? Has everyone gone off
the deep-end and forgotten that it is not measuring the speed of the p6
or 604 and their memory subsystems, but also disk performance?
With that in mind, throwing around Spec numbers is somewhat worthless
when evaluating CPUs (as opposed to boxes). How about CPU intensive NT
apps? I assume that NT and the various compilers on the different
platforms are mature enough to get some reasonable measurements.
M
The spec 95 benchmarks relate to shippable technology. PPC is clearly
on top.
P6 benchmarks are pure smoke and don't relate to anything you [and I]
can use to solve a problem today [or in the next few quarters].
Intel must be worried.
In <478qop$9...@steel.interlog.com> dav...@interlog.com (Dave Glue)
writes:
>
>On 1 Nov 1995 19:54:44 GMT, eng...@primenet.com (Lawson English)
>wrote:
>
>>Well, here they are. Even allowing for improvements in compiler
quality,
>>the new P6 benchmarks don't look so promising for PowerPC.
>
>To whoever you are: Posting under Lawsons name is not funny. Please
>refrain from doing so.
>
>(Anyone else think the above panicky post was quite bizarre
>considering it came from Mr. English?)
>
>All that being said, keep in mind right now the 512k L 1.5 version of
>the Pro at 200mhz is close to _$2000_. I fail to see why this spells
>doom for the PPC consortium when even faster Alpha's have been
>available for relatively the same price. The 150mhz P6, perhaps, but
>the 604E will just about match it. I think it will continue to be
>bussiness as usual, Intel having the greater market share, and Apple
>and PPC consortium selling as many as they can, and perhaps more when
>the clones arrive.
>
Craig Koller
: ANd given 4 quarters for the price of P6-150 systems to drop to the current
: pricing of P5-100 systems, you'll see an Intel system with 2x the
: performance of a PowerMac 604/132 being the *average* home purchase by next
: Christmas.
Wait... you mean running NT? With 16+ megs of RAM? I thought computer
sales were down at this point, that most people are spent out buying
their Pentium computers. What kind of speed will entice home users to
buy yet another computer? Most developer's apps have to run on a 33/486
still. I just don't see this happening, not during the next Christmas
cycle. There'd have to be some hellacious killer app that ran flawlessly
on a P6 (big-screen, high definition interactive video?) to cause an
en-mass flood of purchases.
: And the ease-of-use factor no longer exists in most new computer buyers
: eyes. The hype about Windows 95 has taken care of that (between the end
: of summer and this time last year, I had 20 newbies call wanting
: Mac tutoring -since the release of WIndows 95, I've had TWO calls).
And yet Mac market share increased 1.5%. What's up with that?
: If (IF) AIM can ramp up production of 604e's and 614's MUCH earlier than
: they are talking now, the PowerPC and Apple may have a chance (remember
: that most of Apple's profit comes from the middle/high-end, precisely
: where Windows NT and P6 machines are targetted).
Ay, that's the rub. NT could snag the 3D market bigtime, not to mention
video and 2d graphics. Multimedia development could go NT if Apple
doesn't get off its ass and do something soon. I'm amazed how everybody
from Apple, to Novell, to Lotus, to [insert corporate idiot here] seems
to be handing Microsoft the future. Intel, I believe is truly earning
it. Let's face it, they're pulling off a miracle.
: If (I'd love to be wrong here) AIM can NOT ramp up production, Apple and the
: entire promise of PowerPC machines will go away, IMHO. Apple is the cash
: cow for PowerPC and if they slip drastically in sales, the PowerPC will have
: become a financial black hole for AIM.
We'll see. We may have Intel to thank for a much, much faster PowerPC.
Hell, we already *do* have them to thank for the 604 at this point. And
Wintel users have AIM to thank for the P6. Ain't competition a grand thing?
Bottom line: Don't lose sight of the fact that we're all winning here.
M
volume or software support.
HP has cut a deal to work on some chip development with Intel; in
short, they probably realize the difficulty in maintaining an
investment in building chip technology over the next 5 years. HP is
smart. Alpha's price point is too high since DEC does not have the
volume to price it cost effectively so the bean counters have set a
skim strategy to make pricepoints work [they can no longer afford to
lose money building market share at DEC] -- this guarantees Alpha
failure long term. MIPS has faded away.... Sparc is tied to Unix...
Predictions include a market in five years with Only two dominant chip
suppliers [PPC and Intel variants]. All the rest will be gone or
driven into very small niches. These changes will have dramatic
effects on suppliers such as Sun whose sparc products will occupy one
of these niches. Sun is a big company but IBM/Motorola represent more
than an order of magnitude more financial muscle.
PPC will gain significant and powerful support for many reasons. One
of the not so obvious reasons is that Intel is willing to sacrifice
long term relationships and profits for short term gains. The foray
into the motherboard business threatens the very distribution channels
that they want to sell to -- how do you think Unisys, ATT, whoever feel
about watching Intel package motherboards and box systems?
Behind the scenes, ALL of the major manufacturers and suppliers
will/are sourcing ppc based systems to maintain some leverage over
Intel dominance. Most of us don't see this now as the product
announcements are not yet made -- have no fear -- they will be.
For these reasons and others PPC represents the only viable alternative
to Intel and one that will gain significant market share over the next
3 years.
Dan Hildebrand
Edmond <unde...@Colorado.Edu> wrote:
>jd-...@ta1.cs.uiuc.edu (Jim Wong) wrote:
>>"Brent K. Presley" <b...@acpub.duke.edu> writes:
>>
>>>Yeah, but by the end of Q4 of next year the P6 should be able to get 500
>>>SpecInt92 easily. Just take the current SpecInt92 for the 200MHz P6 and
>>>adjust the MHz upward until you get 500 or greater. x(MHz)/500=200/366
>>>This solves out around 275 MHz. Rumor has it that Intel will be able to hit
>>>300Mhz by end of next year. WOW!!!! (that's SpecInt92 of 549 just by ramping
>>>up the MHz)
>>
>>linearly with clock rate.
>>--
>>Jim Wong (jd-...@uiuc.edu)
>
>They will be likely adding cache (on board and perhaps internal). In that
>case, it could perform linearly or even better. It seems that on-board
>caching has it's advantages when viewing the latest benchmark scores.
Since the P6 cache is clocked at the same speed as the CPU (and not limited
to 66 MHz as with the 604 and P5), a linear speedup with clock rate will be
much more likely with the P6 than with CPUs using an external L2.
--
Dan Hildebrand (da...@qnx.com) QNX Software Systems, Ltd.
http://www.qnx.com/~danh 175 Terence Matthews
phone: (613) 591-0931 (voice) Kanata, Ontario, Canada
(613) 591-3579 (fax) K2M 1W8
Edmond
>In article <47ea8s$9...@nnrp3.news.primenet.com>,
>Lawson English <eng...@primenet.com> wrote:
>>
>>ANd given 4 quarters for the price of P6-150 systems to drop to the current
>>pricing of P5-100 systems, you'll see an Intel system with 2x the
>>performance of a PowerMac 604/132 being the *average* home purchase by next
>>Christmas.
>
>Windows 3.1 or Windows 95. If the home user buys Windows NT or OS/2
>or uses Linux, then its another matter.
>
>Anyway, I have a lot of questions about Intel's new compiler technology :
>when will we see commercial products based on it ? Also, from whats been
>posted here, it appears that the compiler analyzes performance, recompiles,
>using feedback from perf. statistics from the first compile, etc. -- a most
>impressive technology, but how well does it work on other-than-benchmark
>programs ? I guess we'll have to wait and see. Considering that the P5
>is said to have its specint92 raised to 190 from 155 (again, that is what
>was posted in these groups), my sig. is relevant, I think.
>
I heard that this technology is only good for benchmarking. I have never
heard of a commercial piece of software based on it. Have you? As far as
P6 optimizations go: VC++ 4.0 can do them, BC++ 5.0 will be able to do
them, as well as a newer version of the Watcom compiler (perhaps version
10.6 or 10.7). It looks as if the P6, oops I mean the Pentium Pro, is
becoming mainstream after all.
Edmond
First off Matt, the 604 is at 176. Take those numbers verses the 220-225
that Motorola posts and it makes a lot of sense. Anyway, would doubling
the internal cache size really make a huge difference when comparing a
very memory-bound SPEC test?
--------------------------------------------------------------------
Edmond
>In article <47di39$5...@nntp.crl.com>
>jeff atwood@jatwoodappp (Jeff Atwood) writes:
>
>> As for current plans, there isn't anything announced in
>> '96 as of yet that will approach P6-200 performance. And Intel will be revving the clock
>> speeds of current P5 and P6 designs in '96 I'm sure.
>
>You right, there has nothing been announced in '96, yet. :) But there
>was an announcement in September 1995 about the ppc614->500 SpecInt, to
>begin sampling next year.
>
>http://zcias3.ziff.com/~macweek/mw_09-25-95/news1.html
>
Where do they get these kind of numbers for samples? Is that a guess or
has it really achive those performance parameters in early tests?
Little Caesar
> All of this is somewhat amusing.
>
> The spec 95 benchmarks relate to shippable technology. PPC is clearly
> on top.
>
> P6 benchmarks are pure smoke and don't relate to anything you [and I]
> can use to solve a problem today [or in the next few quarters].
>
> Intel must be worried.
P6 systems are shipping. Today.
--
damir smitlener |
da...@mindspring.com |
smi...@optica.mirc.gatech.edu |
Dan Pop
> If I were to guess, I would
>think that Apple encourage people to build CHRP boxes, then deemphasize
>its hardware side, and concentrate more on its strength, which has
>always been its OS and apps.
The OS is (currently) the weakest part of a Mac. It's definitely the
part of the package which needs to be fixed ASAP. Apple isn't particularly
interesting in doing it, because their customer base is composed mostly
of people who can't realize this (the same as with Windows 3.1 or 95).
So, what we see is an OS which still inherits a lot of silly limitations
from the days of the first 68000-based Mac's and, worse, still uses chunks
of the 68k code. The net result being an environment providing half the
speed of NT/PPC, without multiuser capabilities, without true multitasking
and without a decent virtual memory system. But since Joe Mac User has
never seen any better, Apple goes happily on. It couldn't care less
about the power users.
BTW, is Apple also selling apps? Never seen anything on the shelves.
Dan
--
Dan Pop
CERN, CN Division
Email: dan...@mail.cern.ch
Mail: CERN - PPE, Bat. 31 R-004, CH-1211 Geneve 23, Switzerland
Tom L. Davis
Is SunOS suppost to be one of the better OSs? What a joke. The Sun OS is
buggy. Most apps for the Sun are buggy and have a very poor UI. The Sun,
in our network environment, isn't stable. It doesn't really crash, but
availablity is poorer than my Mac (which, on rare occations, does crash).
If my Mac crashes, I'm back working within one or two minutes. With the
Sun, it's at least 30 to 60 minutes before I can do anything.
I don't know what you do on computers, but I do Matlab (and a little
tcl/tk). The PowerMac is just as fast as Suns, and much easier to deal
with. I can get much more work done on my Mac.
Not to say that the MacOS couldn't stand a little work in the PM and
virual memory area. We all want this. And when it arrives, Unix will look
even more ridiculous.
Tom
Douglas Borsom
...
>BTW, is Apple also selling apps? Never seen anything on the shelves.
I believe Claris Software, a pretty successful developer of Mac apps, was
spun off from Apple several years back.
-doug
David C. Navas
>And not necessarily a bad thing. Sure, I like pre-emptive
>multitasking, but a user will want an easier interface to get work
>done on _one_ program rather than struggle with several, even if they
>can all run at once.
Like so many who don't understand the advantages, you confuse "program" with
"task". Let's say I have two spreadsheets open and I'm speculating on how
different numbers will affect my bottom-line. I send the one calculating, and
I pop over to the second one to consider an alternative set of numbers.
Same program. Different tasks.
Pre-emptive multitasking makes it a *lot* easier to write code that does this.
An OS that's built to service programs like this is even better.
[I was going to use a real example from the Metrowerks compiler which I
found myself wishing for, but I wanted to show that this feature isn't
just for techno-pinheads like myself.]
--
David Navas ja...@netcom.com dna...@us.oracle.com P11 -- your "friend"
Minbari: "bonehead" will never mean the same thing again. (season 1)
Minbari: Things are getting hairy on Babylon 5. (season 2)
Frank Nichols
>Intel has already stated they plan to have a 300mhz P6 in late 96. I
>would say that by evidence of the 200mhz model this soon, that that is
>certainly reachable.
hmmm, fasinating logic - lets see:
We reached the 4 miniute mile much sooner than some predicted - therefore
we should even sooner reach a 2 minute mile...by this logic I will soon
be able to run anywhere in no time - guess I better sell my car before the
bottom falls out of the market.
Frank Nichols
Analysts International Corporation - Denver, Colorado
The opinions expressed are neither mine nor my employers.
I am not smart enough to have opinions,
They are too smart to let me speak for them.
Frank Nichols
>The OS is (currently) the weakest part of a Mac. It's definitely the
It is also its strongest part - it is still generally recognised
as the "easiest" OS for newbies to learn and use.
>part of the package which needs to be fixed ASAP. Apple isn't particularly
>interesting in doing it, because their customer base is composed mostly
>of people who can't realize this (the same as with Windows 3.1 or 95).
Not exactly, reword to say, "because their customer base is composed
mostly of "non-technical" types that dont care about it. In general,
most people are "happy" with the state of color TV technology - and
are not DEMANDING high resolution TVs. However, once they get a HiRes
model they will readily see and appreciate the difference.
>So, what we see is an OS which still inherits a lot of silly limitations
>from the days of the first 68000-based Mac's and, worse, still uses chunks
>of the 68k code. The net result being an environment providing half the
Agreed - on the other hand MOST users were able to make the PPC
transition with little or no pain and still get acceptable if not
stellar performance.
>speed of NT/PPC, without multiuser capabilities, without true multitasking
>and without a decent virtual memory system. But since Joe Mac User has
>never seen any better, Apple goes happily on. It couldn't care less
>about the power users.
I have NEVER seen or known a Mac user which needed/wanted multiuser -
other than a few techo-geeks like me.
"True" multitasking is a religeous statement. Preemptive multitasking
is great where it is needed - but again, the consumer market wouldnt have
a clue what you are talking about - and could care less. "True"
multitasking has taken on a life of its own without regard to value as
a result of marketing hype.
Personally I would be very happy with coop-multitasking if Apple would
fix the two real problems with their OS -
1. Protected memory system - NO MORE OS CRASHES.
2. Good Virtual Memory system.
Frank N
Dave Glue
>First off Matt, the 604 is at 176. Take those numbers verses the 220-225
>that Motorola posts and it makes a lot of sense. Anyway, would doubling
>the internal cache size really make a huge difference when comparing a
>very memory-bound SPEC test?
I think the early test of the 604 had it at 176, then IBM did some
Mark Hahn
> All of this is somewhat amusing.
yes; anonymous posting, OTOH, is just silly.
> The spec 95 benchmarks relate to shippable technology. PPC is clearly
> on top.
I'm interested to hear of a shipping PPC box that beats 7.29/6.10,
which you can achieve on a P6/180 from Micron today.
Andy Glew
with a 256K cache is faster than a 300 Mhz Alpha 21164 with a 4 MB cache
on SPECint base95?
Pentium Pro: 8.09
Alpha 21164-300: 7.33
If this is true, then the Intel guys should get a big raise and go to
The Islands for a year. Everyone else should just throw down their swords!
While I like the suggestion about going to The Islands (which
islands?), I think that most of the P6 team is busy working on new
projects - some on the next chip, some, like me, a bit further out.
And, while I like the suggestion of having the competition throw down
their swords, well, Intel *is* hiring for aforementioned future chip
efforts. There's lots of work to do. So as long as any particular
member of "everyone else" is not a raving RISC fanatic, drop us a
line.
--
Andy "Krazy" Glew, gl...@ichips.intel.com, Intel,
M/S JF1-19, 5200 NE Elam Young Pkwy, Hillsboro, Oregon 97124-6497.
Place URGENT in email subject line for mail filter prioritization.
DISCLAIMER: private posting, not representative of employer.
We're looking for a few good microarchitects for our research labs.
Andy Glew
Ian S. Nelson
>>
>> long time ago. Kind of crazy to expect anything less.
>>
>It doesn't just leapfrog it-- it CLOBBERS it. That's what surprises me. There is *nothing*
>currently in the PPC stable that comes even close to a P6-180 or a P6-200. Even the PPC 604e
>166 isn't within shouting distance. As for current plans, there isn't anything announced in
>'96 as of yet that will approach P6-200 performance. And Intel will be revving the clock
>speeds of current P5 and P6 designs in '96 I'm sure.
There isn't anything announced. That doesn't mean much, there have been plenty
of rumors around from the various PPC camps about various chips. MacWeek has
published several articles naming chips like the 614 and 613. I don't really
think MacWeek knows what the hell they are talking about when it comes to chips
but a published rumor is a little stronger than nothing.
In all honesty I'd expect a faster chip by February. Cobra and Musky might
even be used for it. (from the as/400 group)
>So much for technical superiority, eh?
Not really. It jsut says that they didn't plan on that kind of performance
at this time. In my mind that 601 was the transition chip, the 604 and 604e
were the chips to compete with pentiums and fast pentiums and then they'd go
from there. If it takes AIM a year or more to regain performance lead, then
I'd say they lost the technical superiority, right now it is just regular
business. Nobody is saying that Japanese car companies have lost their edge
becuase the 96 Fords were out before any 96 Toyotas.. Competitors are supposed
to make better products and trade off the lead, the size of the lead just makes
a statement about how serious they take their competition. IBM and Motorola
might have new chips ready to roll.
Jim Wong
>>They will be likely adding cache (on board and perhaps internal). In that
>>case, it could perform linearly or even better. It seems that on-board
>>caching has it's advantages when viewing the latest benchmark scores.
>Since the P6 cache is clocked at the same speed as the CPU (and not limited
>to 66 MHz as with the 604 and P5), a linear speedup with clock rate will be
>much more likely with the P6 than with CPUs using an external L2.
Only if your applications fit in the cache.
--
Jim Wong (jd-...@uiuc.edu)
Clint Olsen
>For these reasons and others PPC represents the only viable alternative
>to Intel and one that will gain significant market share over the next
>3 years.
*Yawn*, PowerPC advocates have been saying that for the last couple of
years. The predictions haven't been so accurate now, have they?
-Clint
Alan Lovejoy
writes:
>
>love...@ix.netcom.com (Alan Lovejoy ) wrote:
>>In <47dq26$g...@ixnews4.ix.netcom.com> msc...@ix.netcom.com (Mike
>>Schmit) writes:
>>>
>>>In <47cn94$6...@ixnews2.ix.netcom.com> love...@ix.netcom.com (Alan
>>Lovejoy )
>>>writes:
>>>
>>>>It has been suggested that the Pentium Pro somehow represents
>>>>the failure of RISC. I respectfully disagree. The Pentium Pro
>>>>in fact represents the triumph of RISC. To understand why,
>>>>one must first recognize that RISC is a matter of instruction
>>>>set architecture--and not a matter of caches, pipelines,
>>>>functional units operating in parallel, branch prediction,
>>>>tomasulo scheduling, or any other sleight of circuitry.
>>>>
>>>>The RISC argument has always been that the instruction set
>>>>architecture matters because it determines how easy it is to
>>implement
>>>>the circuitry required to make the CPU fast, and because it
>>determines
>>>>the effectiveness of the tools in the hardware designer's
>>>>armamentarium. It also affects the ability of translators to
produce
>>>>optimal code.
>>>>
>>>>The performance of the Pentium Pro is due to the fact that its
>>>>internal instruction set architecture is RISC, not CISC. It
>>>>dynamically translates x86 CISC instructions into RISC
instructions.
>>>>Apparently, it takes less chip real estate to translate one
>>instruction
>>>>set into another than it would to make a fully native x86 CPU as
fast
>>
>>>>as the Pentium Pro. That's pretty strong proof of the potential
>>value
>>>>of a RISC instruction set architecture!
>>>>
>>>>RISC has finally conquered all.
>>>
>>>Actually, RISC is about more than that and one could easily
>>>argue the opposite.
>>
>>Sure, RISC is a multifaceted subject. I never said or implied
>>otherwise. Did you think I had?
>>
>>In order to argue the opposite convincingly, you would have to
>>demonstrate a pure CISC cpu that could touch the fastest Alpha, MIPS
or
>>HP-PA processor. There is no such beast, as far as I am aware (and
>>the P6 doesn't count because it has a RISC core).
>>
>
>Can a Micro-op really be considered a RISC instruction? What about
>Cyrixes 6x86? If they ever get it on the .35u process, add caching,
and
>boost the clock, it could be in that performance range.
The concept of RISC was developed in contrast to the CISC technology
of the time, which typically used microcoded instructions. One of
the ideas that motivated the RISC concept was that the compiler
could emit optimized micro instructions instead of invoking the
"hard-coded" microcode functions (the microcoded machine instructions).
This is completely analogous to function inlining and/or global
inter-procedural optimization. When you invoke a function or
microcoded machine instruction, it is possible--even likely--that
the function body or instruction microcode will do unecessary work.
If the compiler can inline the function call--or emit micro ops--it
can optimize the work done for each invocation.
So mircocode ops inspired the RISC instruction sets of the original
RISC CPUs. In any case, the principles of RISC are equally applicable
to external ops and micro-ops. That's the key point.
As for the Cyrix cpu: it would seem to be yet another argument in favor
of using RISC principles to design the ISA of your internal processor
(assuming you have to have an internal processor :-)).
>>>All these things are/were to keep the design simple so that
>>>instructions can execute in a single cycle and then other
>>>techniques could be used to improve performance even more
>>>using the transistors that were left over. i.e. piplining,
>>>superscalar, big caches ...
>>
>>"All these things" are the result of applying the RISC design
>>philosophy, which can be expressed in abbreviated form as follows:
>>reducing the "complexity" of the work required to execute each
machine
>>instruction makes it possible to construct a faster processor.
>>
>
>The P6 doesn't reduce the complexity, unless you think that 14-stage
>pipeline is simplistic.
Whether the P6 design reduces complexity depends on what you
compare it to. In this case, the important comparison is to the
chip that would have been necessary to achieve the same level of
performance with the following two constraints: 1) it must be
x86 compatible, and 2) it must not translate x86 instructions into
some other instruction set whose instructions are less complex
than that of the x86 ISA.
I don't remember the numbers off hand, but several of those 14
pipeline stages are there for the instruction set translation.
Those don't count when comparing the internal processor of the P6
to its competitors.
The question is this: does the ISA of the micro-ops benefit the
P6 more than the instruction set translation circuitry hurts it?
This involves the transistor budget, the critical paths and the
pipeline depth. If the answer is that the ISA of the micro-ops
is a net win, then the fundamental thesis of the RISC design philosophy
is confirmed (that the ISA is a very important determinant of
performance potential, that simpler instructions permit the
instruction emitter to produce better optimized instruction sequences,
and that simpler instructions enable either much faster clock rates
or more aggressive performance enhancement circuitry that speeds up
the processor as a whole). Otherwise, Intel could have done even
better by executing x86 instructions directly. I don't believe that's
true.
>...Would you consider VLIW a RISC approach?
Good question. VLIW essentially "hard codes" the superscalar capacity
of a CPU into the ISA. I think it's a bad idea, but it's probably
orthogonal to RISC.
>I'm not sure RISC-like is the correct word for the P6. RISC CPU's
utilize
>many of the technologies that the P6 does: branch prediction, out of
>order execution, pipelining, etc., but that doesn't make it a RISC
chip.
Yes, it's a processor's instruction set architecture that qualifies
it as a RISC, not it's "physical architecture"--if I can coin a
phrase.
>I'll have to keep reading up on the P6 to fully compare and contrast
the
>two designs.
-----------------------------------------------------------------
>Edmond Underwood
>Computing & Network Services (University of Colorado)
>E-mail: unde...@Colorado.Edu
Thanks for the conversation!
Eric King
Atwood) wrote:
:In article <nelsoni....@nag.cs.colorado.edu>,
nel...@cs.colorado.edu (Ian
:S. Nelson) wrote:
:>
:> The p6 should leapfrog it, it came out this week and the 604 was released a
:> long time ago. Kind of crazy to expect anything less.
:>
:
:It doesn't just leapfrog it-- it CLOBBERS it. That's what surprises me.
There is *nothing*
:currently in the PPC stable that comes even close to a P6-180 or a
P6-200. Even the PPC 604e
Ah, so this is where you finally ended up, Jeff. You should've stayed
on AOL a little longer. One of the folder denizens (Wndrllamma) has moved
on to a new company, and guess what, they have a bunch of P6-150 seed
systems. They also have a bunch of 9500/132s all of which, he says run
merry little circles around the P6 systems. With SPECs like the P6 has, a
lowly 604 should *never* be able to do that, especially while running at a
lower clock-speed.
Similarly, if one were to continue to infer relative integer and fpu
speed from the SPEC figures a 604 should *never* have gotten higher
Bytemarks than a 150MHz P6, yet Byte shows a --100MHz-- 604 NT system
getting higher fpu *and* integer benchmarks. (Nov. Issue pg. 210) Who
knows what a 604e system will get.
:166 isn't within shouting distance. As for current plans, there isn't
anything announced in
:'96 as of yet that will approach P6-200 performance.
Don't be too sure, Very very few people have actually had a chance to
play with one of the puppies. In some thread you mentioned something about
performance for a processor scaling somewhat linearly with clock speed.
Well, according to the Bytemarks a 200MHz P6 system would *still* be
slower than a 133MHz IBM Personal Power System. ~2.8 integer and ~2.3 fpu
for a linearly scaled P6-200, vs. 2.9 integer and 2.9 fpu for a Personal
Power.
Of course now it's time to bash on Bytemarks. They're nowhere near as
comprehensive as the SPEC suite nor are they real apps. There is one
*very* important thing about them though. They are compiled with the same
compilers that every Windows developer has access too and are able to run
on the OSes that the bulk of developers develop for. The last time I
checked Intel's reference compiler only ran under SCO's (and others?)
unix, which is great if you're a unix developer and user, but since most
people aren't...
The performance increases that one can infer from the Bytemarks are
probably much more inline with what most people will see while running
their apps on the P6. There may be a few spots where the P6 can really
shine but like other chips, the P6 will be crippled by the software it
runs.
Someone recently posted a slew of P6 app benchmarks, unfortunately I
didn't save them, but when one worked out the math and scaled
appropriately, the P6 came in at being roughly 33% faster than a Pentium
of the same clock-speed. A good improvement for sure. When scaled, the
Bytemarks made the P6 to be ~28% faster in integer which is pretty close.
All of this scaling definitely incurs some error, but it's good enough for
a rough approximation of performance, especially when considering
different speeds of the same processor. Furthermore it's virtually
impossible to get anything more meaningful than a rough approximation with
most apps these days.
And Intel will be revving the clock
:speeds of current P5 and P6 designs in '96 I'm sure.
:
:So much for technical superiority, eh?
So much for meaningful benchmarks.
Oh yes, and about those Micron prices you quoted... Just for comparison:
Pro 200 Magnum Plus (A) $5,599
Intel Pentium 200MHz Processor
256K Internal CPU SRAM cache
32MB 70ns DRAM (expandable to 128MB)2
3 ISA, 3PCI, 1 ISA/PCI Slot shared
Phoenix Plug-n-Play Flash BIOS (Upgradeable)
Intel Orion Core Logic Chipset
1.44 MB 3.5" floppy disk drive
145ms 6X Six Speed 900kbs SCSI-2 CD-ROM drive
PCI 32-bit Ultra SCSI Fast-20 controller
2.0GB Fast SCSI-2 hard drive
PCI 64-bit PC graphics accelerator w/2MB DRAM
Creative Labs Sound Blaster 16 w/ KOSS HD/5m mini speakers
15" Micron 15FGx .28 NI SVGA color monitor
1 parallel, 2 serial ports (16550 compatible)
MiniTower chassis with "Tool Free" design
104 - key enhanced ps/2 keyboard
MS Mouse 2.0 with Mouse Manager (ps/2)
MS Windows NT 3.51 Workstation Pre-loaded on CD-ROM
MS Office Pro 95 on CD-ROM
FCC class B, UL, CUL, & CE certified
- Intel 150MHz Pentium Processor subtract $ 400
+ 17" Micron 17FGn SVGA color monitor add $ 650
+ ATI Graphics Pro Turbo (Mach 64) w/2MB Vram add $ 200
+ 16-bit NE2000 ISA compatible Ethernet NIC add $ 79
----------------------------------------------
Total $6128
Now for a PowerWave from Power Computing
(Ethernet is standard)
The total cost of the following configuration:
PowerWave 604/132 - 132MHz PowerPC 604 CPU
Mini-tower Case
Three PCI Slots
32MB RAM (DIMMs)
2GB Hard Drive
No Secondary Hard Drive
with a Quad-Speed CD-ROM Drive
without an Iomega Zip Drive
Ikegami 17 inch Hitachi Monitor
512K Level 2 Cache
64-bit PCI Graphics Accelerator with 2MB VRAM
Sony SRS-PC20 Speakers
Standard Warranty Service
--------------------------------------------
Total $5802.00
These systems should be somewhat comparable. Similar video, amount of
RAM, HD interface and capacity, monitor size, ethernet, CD, sound, etc.
The Micron system has a faster CD-ROM drive, but the PowerWave has a
larger L2 cache.
For now, the general CPU performance of the PowerWave should be similar
or better than that of the Micron. After all a 9500/120 gets Bytemarks of
~2.4 whereas the Micron will probably get something similar to the 2.10
that Intel's system got. Scaling with clock speed should put the
PowerWave's Bytemarks somewhat higher, but not enough to push it all that
far ahead. Of course, I expect the Micron benchmarks to go up over the
next year as MS, Borland, Watcom, etc. improve/implement their P6
optimizations, but I doubt they'll touch the results given by Intel's
compilers.
Differences in disk performance can vary widely, but that's due more to
the OSes in question than the processors driving them. NT could very well
crush the MacOS in this respect, but then again it might not. Depends on
what you'd be using the system for.
The $300 price difference is fairly negligible in this example, and
would almost definitely fall onto the PC side if one chose a couple of
EIDE drives instead of SCSI, but who wants to run NT on EIDE ;) Basically
despite the *thick* clouds of hype floating around, there's a rough
parity.
Later,
-Eric
--
"Maybe the eyeballs are in the radiator"
-The Prophecy
Matt Peterson
ha...@neurocog.lrdc.pitt.edu (Mark Hahn) writes:
> I'm interested to hear of a shipping PPC box that beats 7.29/6.10,
> which you can achieve on a P6/180 from Micron today.
Really? Are those numbers from the Micron system, or from Intel's
system? Is Micron just taking orders, or are they also shipping them?
Dan Pop
>eng...@primenet.com (Lawson English) writes:
>...
>[A read 'em and weep list of P6 advantages over the PPC 604]
>
>>GADS! The ONLY saving grace for the PowerPC looks to be availability of the
>>P6 at higher speeds.
>
>And price, perhaps.
Nope. Nobody buys chips, they're pretty useless by themselves :-)
People buy complete systems and we have no evidence that a P5-150 box
will be more expensive than a slower PMac 9500.
brobin
>
>> Pentium Pro: 8.09
>> Alpha 21164-300: 7.33
>
>21164A will handily win back the integer crown shortly. And,
>something I found interesting... the P6 has 3x as many core logic
>transistors as the 21164 (and 21164A). Also, as mentioned elsewhere,
>the FP numbers are 2x in the favor of the year old 21164.
>
Yes all this is true, but keep in mind that intel's numbers were
derived using only 256k L1.5 cache. Even so, I doubt very seriously that
intel wants to play the "were the fastest" game with ALPHA, the
game they are playing is with PPC, it's high performance AND
high volume manufacturing.
Bob
Edmond
>In article <47had4$j...@usenet.srv.cis.pitt.edu>
>ha...@neurocog.lrdc.pitt.edu (Mark Hahn) writes:
>
>> I'm interested to hear of a shipping PPC box that beats 7.29/6.10,
>> which you can achieve on a P6/180 from Micron today.
>
>Really? Are those numbers from the Micron system, or from Intel's
>system? Is Micron just taking orders, or are they also shipping them?
What's the difference between the 2 systems? Isn't Micron basically using
the same motherboard and design from Intel? I believe Micron says you
will can order now and wait 2 weeks for the actual system to ship to you.
There wasn't any 4 MB cache controllers, or 1 MB caches, or seperate
motherboards for the Intel Alder system. Infact, I looked at Sysmark for
NT, and it was the Intergraph TDZ-300 that beat out the Alder. I believe
HP's design is about 10-15% faster than the Alder design also. You may
find real shipping P6 systems to be faster than Intel's system.
--------------------------------------------------------------------
Mike Haertel
>>"All these things" are the result of applying the RISC design
>>philosophy, which can be expressed in abbreviated form as follows:
>>reducing the "complexity" of the work required to execute each machine
>>instruction makes it possible to construct a faster processor.
>
>The P6 doesn't reduce the complexity, unless you think that 14-stage
>pipeline is simplistic.
I think one reason for all the confusion surrounding the question of
what is or isn't "RISC" is that people have confused the means with the
ends. The goal of computer architects is to reduce time. Reducing
complexity may be a means to the end, but given a choice between (a) a
simple, slow computer and (b) a more complex, fast computer, I'll
take (b) every time!
The world is a different place today than it was when the classic RISC
ideas were being worked out--we can put 100 times as many devices on a
chip, and memory is relatively much slower compared to the CPU.
If the design requirements are changing, then it should come as no
surprise to anyone that the means to achieve those requirements may
also need to change. The result of this is that some parts of the RISC
dogma are now irrelevant, and others have relatively greater importance
than they used to. Finally, there are new considerations that aren't
even mentioned in the classic RISC papers.
--
Mike Haertel <hae...@ichips.intel.com>
Not speaking for Intel.
Jeff and Dori Maggard
>In article <47c8kf$7...@caesar.ultra.net>,
>Jeff and Dori Maggard <j...@dori.ultranet.com> wrote:
>>df...@kalypso.cybercom.net (Dave Ford) wrote:
>>
>>>OK, could somebody explain to me in technical terms how a 200 Mhz Pentium
>>>with a 256K cache is faster than a 300 Mhz Alpha 21164 with a 4 MB cache
>>>on SPECint base95?
>>
>>> Alpha 21164-300: 7.33
>(...)
>>If the 21164-333 numbers don't match the ~8 listed agove, then the
>>21164A will handily win back the integer crown shortly. And,
>>something I found interesting... the P6 has 3x as many core logic
>>transistors as the 21164 (and 21164A). Also, as mentioned elsewhere,
>>the FP numbers are 2x in the favor of the year old 21164.
>OK, let's compare the 21164A-333 with the P6. A previous poster claimed
>500 SPECint92 for this chip. If the P6 is 367 SPECint92 at 200 Mhz, then
>the P6 should hit 500 SPECint92 at about 275 Mhz. At the same clock rate
>of 333 Mhz, it's 611 SPECint 92, which is 20% faster than the 21164A-333.
>I know this is integer performance and the Alpha still kicks butt on
>Floating Point, but many applications don't use Floating Point. One very
>important class is database applications.
>The point is, the Alpha is generally regarded as the fastest CPU around.
>After the P6 announcement, it can only make this claim for FP. The Pentium
>is now the fastest integer CPU on the planet.
>Dave Ford
Dave,
Can we keep the conversation reasonably honest and compare what IS
NOW, instead of what WILL BE in 1996? Announcements for Q2 1996 don't
cut it in the "available now" category. 21164A will probably be
announced Q2 1996.
First off, you should know that Intel has increased their SPECint92/95
numbers relative to the rest of the industry by 23% through a compiler
hack. Look at their recent claims of P5-120 performance vs. about 2
or 3 months ago. Surprise, a "magic" 23% increase.
See comp.benchmark and other posts for details... but suffice to say
that since Intel has hacked their SPECint92/5 compilers, the "secret"
of the hack has leaked. So all of the Alpha, MIPS, Sparc, and
everyone else's SPECint92/95 numbers will also be increasing by 23%
shortly. Kudos to the authors of the Intel SPEC compilers on a very
clever hack.
But does it sound dishonest to you for Intel to not compare apples to
apples? And I'm sure you'll see a "magic" 23% performance increase in
YOUR software on YOUR systems in two weeks. Not. Don't like it?
Then blame Intel. They started it.
Getting back to the point of this post... the 21164-333 is shipping
now, giving (on top of the compiler hack) an additional ~11% increase
over 21164-300 in the currently posted SPECint92/95 numbers. So if we
compare apples to apples compiler hacks for what Alphas are shipping
now with what P6's are shipping now, then you'll see that P6 isn't
faster than Alpha in SPECint92:
Alpha 21164-333 10.01 with compiler hack
P6 166 (200?, 512k?) 8.09 with compiler hack
(note: 7.33 * 1.23 * 1.11 = 10.01)
So given this... if we still want to argue about what WILL BE, then I
bet that when the next Alpha (21164A) is announced, you'll see
approximately a 30% increase over 21164-300. So it's a failly safe
bet that you'll see ~12 SPECint95 21164A Alphas in 1996 at their
lowest speed bin. Higher speed bin 21164As may reach 14 or 15
SPECint95 by late 1996 or early 1997. So shortly after P6-200/512
ships (in "Q2 1996"), Alpha will once again be back to their ~2x in
integer performance.
Let's not all become victims of FUD and Marketing BS. Because if the
rest of the industry played by Intel's "marketing" rules, then you
wouldn't be able to trust anyone's numbers.
- jeff
---
jeff and dori maggard
j...@dori.ultranet.com
Jeff and Dori Maggard
>Patrick O'Neil <pat...@howard.genetics.utah.edu> writes:
>> A fact is a fact. Reality is reality.
>How true that is. As long as there is no 300MHz P6 chip, it is
>not a reality. It may be possible to produce it, or it may not
>be possible. Sun failed for a long time to produce Sparc chips
>that run faster than 70 MHz. If clock speed can be scaled
>into infinity without any difficulty, why don't you know-it-alls who
>get all your information from reading Computer Shopper start dreaming
>about the 1500MHz P6 you're going to buy next year ?
>--
>========================================================================
>Nicolas Gloy Harvard University Division of Applied Sciences
>n...@cs.harvard.edu Computer Architecture + Compilers
Well said, Nicolas.
brobin
>
>166 isn't within shouting distance. As for current plans, there isn't
anything announced in
>speeds of current P5 and P6 designs in '96 I'm sure.
>
>So much for technical superiority, eh?
>
Much as I hate to come to the defense of AIM, remember we didn't know
about the 200mhz P6 until last wednesday. Intel kept quiet. Surely
AIM has something in the works that we don't know about either.
IBM must have know the p6-200 was coming. They get intel samples don't
they?
Either they have something in the works they are keeping quite about,
or there are some really scared people over at AIM.
Bob
Douglas Borsom
>In article <47ddom$q...@lace.Colorado.EDU>,
...
>>
>>They will be likely adding cache (on board and perhaps internal). In that
>>case, it could perform linearly or even better. It seems that on-board
>>caching has it's advantages when viewing the latest benchmark scores.
>Since the P6 cache is clocked at the same speed as the CPU (and not limited
>to 66 MHz as with the 604 and P5), a linear speedup with clock rate will be
>much more likely with the P6 than with CPUs using an external L2.
Well, the P6-166 with 512k of cache performs about the same as the
P6-180 with 256k of cache. But the P5-166 costs several hundred $$ more
and it runs at a lower clock speed.
And neither of the P6s with 512k cache is shipping until next year. So I'm
not sure how easy it will be for Intel to increase both clock speed AND
cache size.
Also the P6-200 with 512 k cache is more than $600 more expensive than
the P6-200/256. And it isn't scheduled to ship until Q2 '96.
Might be a bit of a wait for that 300 MHz P6.
-doug
Jeff and Dori Maggard
>> >Anyway, I have a lot of questions about Intel's new compiler technology :
>> >when will we see commercial products based on it ? Also, from whats been
>> >posted here, it appears that the compiler analyzes performance, recompiles,
>> >using feedback from perf. statistics from the first compile, etc. -- a most
>> >impressive technology, but how well does it work on other-than-benchmark
>> >programs ? I guess we'll have to wait and see.
>no, we DON'T have to wait and see. first of all, profile-directed feedback
>is _not_ the only reason the P6 is fast: PDF provides only a small boost,
>in my experience.
>and of course the components of the spec suites are REAL PROGRAMS!
>they are _not_ synthetic benchmarks, but examples of programs that
>you do run, like gcc. yes, if you spend all day in Word, spec isn't
>representative, nor did it claim to represent a UI-based workload.
>> I heard that this technology is only good for benchmarking. I have never
>> heard of a commercial piece of software based on it. Have you?
>of course. probably not in the very conservative PC world, but I
>wouldn't be surprised of the Mathematica I run on my HP736 didn't
>use HP's compiler and the -I switch (for PDF).
Intel has hacked their SPEC compilers to give a 23% performance boost
to their numbers... hence the "magic" 23% performance increase in the
P5 product line vs. the data they posted several months ago.
The rest of the industry will do the same in the upcoming weeks. So
you'll see Alpha, MIPS, SPARC, and all the rest suddenly increase
their SPECint performance by 23%.
Think you'll get a "magic" 23% performance increase from MS Word or
any other application? Wanna buy some cheap Florida swamp land at a
fantastic low price?
Don't like it? Blame Intel.
Jeff and Dori Maggard
>In article <barrett-0411...@199.171.33.45>
>bar...@gonix.com (Marc N. Barrett) writes:
>> PowerPC 604 | 133Mhz | 200 | now
>> PowerPC 604e | 166Mhz | 225 | mid 1996
><snip>
>>
>>
>> In other words, the 200Mhz Pentium Pro -- which will be available quite
>> soon, if not already -- has a SpecInt92 rating MUCH higher than AIM's
>> PowerPC 604e which won't be available until mid 1996 at least, and has a
>Hmmm...don't you think that it is odd that the 604e, with its larger
>cache and fast clock-rate, is only 12% faster than the 604?
>I think you need to take their numbers and the recent p6 numbers with a
>grain of salt.
>Matt Peterson
>University of Kansas, Experimental Psychology
What you need to do is add 23% to the PPC numbers... Intel hacked
their SPEC compiler to give them a "temporary" marketing advantage.
Jeff and Dori Maggard
>cko...@netcom.com (Craig Koller) wrote:
>>It undermines the fundamental promise of AIM, that the X86 was dying and
>>the PowerPC chip was rising (remember the superscientific graph?).
>>Although the P6 is somewhat of a hybrid monster, it still doesn't make
>>sense that a "dying" chip should be faster than a rising one. It's like
>>auto manufacturers making a few race cars. Sure it doesn't mean joe
>>sixpack will go that fast, but it lends credibility and notoriety to the
>>company.
>I never understood this graph. These days even price/performance
>ratios are not a good way to compare the fastest lower-volume device
>like PPC to the fastest high-volume Intel processor since the Intel
>price can be lowered nearly arbitrarily (they are subsidized by the
>volume of their highest volume devices and the economy of scale).
>Price is business marketing, and the high-volume guy can always play
>with that (in fact he can even *try* to cut prices to bleed everybody
>else to death since he has more blood).
Have you compared Intel's balance sheet to IBM's, or Digital's?
Are you SURE they have more blood?
Then again, if you compare Intel to the AIM venture... I think you're
right.
I also heard that the word on the street is that the AIM venture was
laying people off... Now why would they do that?
Jeff and Dori Maggard
>What a heck of a biased post. No one else optimizes the heck out of their
>SPEC tests? Real world? What are you talking about? What does 6.08 and
>5.6 or whatever have to do with anything? They are arbitrary numbers used
>for comparisons. What you do is take those numbers and match them to the
>other Intel optimized machines. That will give you the absolute
>performance medium. 50 - 100% increase? Over what? A P133. Well,
>according to the magazines that is true using programs optimized for lower
>processors. I'd love to get a 100% application boost personally.
FYI, Intel currently (and I mean currently) has a 23% SPECint
performance advantage over the competition purely due to a clever
compiler hack.
If you do a little research -- and you don't have to look further than
this newsgroup -- you'll find that the P5-90,100,120,133 have all
increased "magically" by 23% over a few months ago.
Did Intel think nobody would notice?
But the word on the method of the hack got out and everyone else will
be "magically" increasing their numbers by 23%... that is if they feel
that it's necessary to stoop down to Intel's slimy level.
David Steffen
>I heard that this technology is only good for benchmarking. I have never
>heard of a commercial piece of software based on it. Have you? As far as
>P6 optimizations go: VC++ 4.0 can do them, BC++ 5.0 will be able to do
>them, as well as a newer version of the Watcom compiler (perhaps version
>10.6 or 10.7). It looks as if the P6, oops I mean the Pentium Pro, is
>becoming mainstream after all.
I read about FDO being used in a commercial compiler recently in this
group. I think it was HP or Sun? Definitely not consumer level
yet... but getting closer.
Anyhow, the real reason why I am posting is that I would like to know
if you (or anyone else) could point me towards info on the P6
optimizing compilers referenced. I looked on their web sites without
much success.
TIA
David Steffen Quicksilver Software Inc. dste...@quicksilver.com
* The opinions expressed here are all mine... not that of my employer *
Jeff and Dori Maggard
>Hmmmm... some observations and additional pieces of information:
>>It seems intel is just the
>>first to give us numbers using FDO for spec and they will probably not
>>bear any resemblence to real world performance.
>This is untrue; if I recall correctly, either HP or DEC were the first to
>use feedback directed optimization on SPEC benchmarks.
Seems that Intel is the first, however, to get a 23% SPECint
performance increase from a clever compiler hack.
Did Intel not expect people to catch the "magic" 23% performance
increase on the P5 product line?
Did Intel choose to publish SPEC benchmark numbers that are "apples to
apples" or "apples to oranges" comparisons to the rest of the
industry. Answer: all of the comparisons of P6 SPECint numbers to the
competition are currently 23% to Intel's advantage... and all legal
according to SPEC.
So ... c'mon folks, lets optimise your compilers and take away Intel's
unreasonable marketing claims!
Jeff and Dori Maggard
>In <478ja4$6...@nnrp3.news.primenet.com> eng...@primenet.com (Lawson
>English) writes:
>>From www.intel.com:
>>
>>++++++++++++++++++++++++++++++++++++++
>>Pentium(R) Pro Processor Systems
>>SPEC95 Pentium(R) Pro Processor
>> 200MHz 180MHz 166MHz 150MHz
>>System Alder Alder Alder Alder
>>L2 Cache 256K 256K 512K 256K
>>
>>SPECint95 8.09 7.29 7.11 6.08
>>SPECfp95 6.70 6.10 6.21 5.42
>> Results measured on Intel Alder systems.
>If my memory serves, these numbers roughly match or
>exceed even the fastest Alphas, MIPS and HP processors,
>not just the PPC. The engineers responsible for this
>deserve big raises.
No they don't. The compiler engineers do. These numbers are 23% in
Intel's favor due to a clever compiler hack.
Non-Intel SPECint numbers must be increased by 23% in order to make a
proper "apples to apples" comparison.
Greg Connor
Maggard) wrote:
>
>Getting back to the point of this post... the 21164-333 is shipping
>now, giving (on top of the compiler hack) an additional ~11% increase
>over 21164-300 in the currently posted SPECint92/95 numbers. So if we
>compare apples to apples compiler hacks for what Alphas are shipping
>now with what P6's are shipping now, then you'll see that P6 isn't
>faster than Alpha in SPECint92:
>
>Alpha 21164-333 10.01 with compiler hack
>P6 166 (200?, 512k?) 8.09 with compiler hack
>
>(note: 7.33 * 1.23 * 1.11 = 10.01)
>
>So given this... if we still want to argue about what WILL BE, then I
>bet that when the next Alpha (21164A) is announced, you'll see
>approximately a 30% increase over 21164-300. So it's a failly safe
>bet that you'll see ~12 SPECint95 21164A Alphas in 1996 at their
>lowest speed bin. Higher speed bin 21164As may reach 14 or 15
>SPECint95 by late 1996 or early 1997. So shortly after P6-200/512
>ships (in "Q2 1996"), Alpha will once again be back to their ~2x in
>integer performance.
>
>Let's not all become victims of FUD and Marketing BS. Because if the
>rest of the industry played by Intel's "marketing" rules, then you
>wouldn't be able to trust anyone's numbers.
You are a desperate, desperate man. Go look at the BAPCo. numbers
then get back to me.
-Greg
Jeff and Dori Maggard
>In article <478ja4$6...@nnrp3.news.primenet.com>, eng...@primenet.com (Lawson English) writes:
>> Well, here they are. Even allowing for improvements in compiler quality,
>> the new P6 benchmarks don't look so promising for PowerPC.
>>
>> I've included older benchmarks from the SPECtable so that folks can
>> compare the effect of the new Intel C compiler version 2.2 on the P5-133
>> benchmarks and extrapolate from there.
>>
>The new compiler seems to make quite a difference
>P133 was ~155 now 190 -> x 1.226
>initial PPro 150 was estimated at 225 announced at 276 -> x 1.226
>all of a sudden a Dell XPS133 is faster than the 604-133 IBM and
>Macs. Why don't the other benchmarks agree: Byte, Mathematica and other
>applications?
>Even so a 200Mhz PPro is a fine achievement, with or without the
>extra 22% the new compiler affords.
>What is the new technology used. I've seen mention of 'Feedback'.
They found out that the short int loop in one or more compiled SPECint
benchmark(s) was slowing things down, so they changed that to
something more efficient. I think it's an array of char... but I'm
not sure. I'm sure someone more knowledgeable will correct me.
Nevertheless, the 23% increase in Intel's benchmark numbers doesn't
matter diddly to us, because OUR software isn't suddenly 23% faster.
It's pure 100% marketing bullshit, and it's legal according to SPEC.
Suffice to say that if you want to make a proper apples to apples
comparison of P6 (and the newer P5) benchmarks to non Intel products,
you must add 23% to the competition's numbers.
Then Intel's BIG performance jump doesn't look so big anymore.
Mark Eaton
O'Neil <pat...@howard.genetics.utah.edu> wrote:
>On 3 Nov 1995, Dave wrote:
>
>> However, if AIM were to produce a $2000 microprocessor, I'm confident
that it would easily
>> outperform a 200 MHz Pentium Pro.
>
>Oh come on. Upon what do you base this conceit? Personal
>emotional-based bias?
Probably more based on the knowledge that Intel has 15 years of baggage to
worry about being backwards compatible with.
I'm sure that if Intel were to make a $2000 chip based on a new
architecture they could do much better.
--
Mark Eaton
ma...@nwlink.com
Jeff and Dori Maggard
>You are a desperate, desperate man. Go look at the BAPCo. numbers
>then get back to me.
C'mon... you're asking us to compare a 2 year old 266Mhz Alpha 21164
with 32MB of ram with not-yet shipping P6 systems with 65MB of ram?
Who's desperate?
Besides, you may have to add up to 23% to all non-Intel SYSmark
benchmark numbers... they've hacked their SPEC compilers (in a
SPEC-leagal fashion) to make themlselves look better. They may have
done the same with SYSmarkNT.
So until the dust settles, and proper "apples to apples" comparisons
are made, all performance comparisons are more or less worthless.
John R. Mashey
|> lose money building market share at DEC] -- this guarantees Alpha
|> failure long term. MIPS has faded away.... Sparc is tied to Unix...
Get the facts straight:
MIPS chips are manufactured by (among others) NEC and Toshiba;
you may not have noticed, but, by chip revenue:
#1 Intel
#2 NEC
#3 Motorola
#4 Toshiba
There were 1.67M MIPS chips in 1994, and we expect about 3.5M-4M in 1995
(before Nintendo); these are less than Intel ... but pretty good compared
to the rest of the major RISC volumes.... MIPS volumes have been approximately
doubling every year for last few years.
-john mashey DISCLAIMER: <generic disclaimer, I speak for me only, etc>
UUCP: ma...@sgi.com
DDD: 415-933-3090 FAX: 415-967-8496
USPS: Silicon Graphics 6L-005, 2011 N. Shoreline Blvd, Mountain View, CA 94039-7311
Smoke Crack and Worship Satan
Maggard) wrote:
> From: j...@dori.ultranet.com (Jeff and Dori Maggard)
> Newsgroups: comp.sys.powerpc,comp.sys.intel,comp.benchmarks
> Subject: Re: Yikes!!! New 200Mhz Intel P6 Benchmarks
> Date: Sun, 05 Nov 1995 21:44:12 GMT
> Organization: UltraNet Communications, Inc.
Look, the SPEC numbers are pretty meaningless already to those of us who do not run UNIX.
They are *purely* indicators of best-case theoretical speed. It doesn't matter if a
compiler from another dimension is used, as long as the stated processor is in the machine
and it's running the regulation SPEC code and it follows SPEC rules. The numbers are by
definition, valid.
If Intel beats the PPC consortium at SPEC, they've beaten them by the same exact rules.
Motorola has bent over backward to optimize compilers for SPEC and otherwise-- look at
CodeWarrior, which is a great PPC compiler. It's a fair contest.. nobody would use SPEC if
the rules were inherently unfair. It's a dog and pony show to eke out the very best
performance numbers from your processor using fancy compilers, fancy machines, and fancy
memory subsystems. Your claim that others should "add 23% to their specmarks" is completely
lame. If they could get better SPEC, they should have already done it.
For that matter, do you think Power Mac users running 601 optimized apps on a 604 machine
are getting the best theoretical SPEC performance out of the 604? Nope. Do you think Power
Mac users running 680x0 binaries are getting SPEC performance? Nope. Do you think Pentium
users running 386 optimized code are getting SPEC performance? NO!!
You've got to take these SPEC benchmarks with a grain of salt. They have virtually no
relation to real shipping apps. They *do* tell you best case optimized performance. If you
want real hard facts, switch to the benchmarks that run real-world applications on
mainstream operating systems-- like sysmark NT, winstone 95, or what have you. Those will
correlate far better with real world performance than SPEC for 99% of users.
And FYI, the real world benchmarks-- including Infoworld's 32-bit business application
suite-- show the slowest P6 (150) as 50% faster than the fastest P5 (133). And this is
running generic everyday business applications, not hyper-optimized versions of PhotoShop
like on the Mac.