Info-IBMPC Digest V95 #170
Info-IBMPC Digest
Today's Editor:
Gregory Hicks - San Jose, CA <GHI...@arl.mil>
Today's Topics:
Question about clock()
Re: Question about clock()
Win 95 Backup Options??
Personal Computer CHIPLIST 8.1 part 1 of 5 (long)
Personal Computer CHIPLIST 8.1 now on WWW
Re: WARP IBM DIALER
NASI Support
Problems with UUPC on TCP/IP-connection
GUI Mailreader for UUPC
Help! Going to WinNT
Re: Clip X
Reverse sort order
Where do I send questions?
Re: Using WIN-OS2 TCPIP under Warp
Re: New Email Notification for DOS.....
uupcdll and NT build
UUPC/extended 1.12p
Shiva PPP and Win-OS/2
Re: The bootp problems
EDO RAM, Triton boards and UARTS
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----------------------------------------------------------------------
From: Jim Hu <j...@sun3.gl.rhbnc.ac.uk>
Subject: Question about clock()
Date: 4 Jul 1995 10:25:07 GMT
Hi there,
I compiled the program below with both Borland C 4.0 and djgpp (v1.12) with
no flag at all. The size generated by bcc is larger and run slower compared
with one generated by djgpp. However, the values printed out by the excutable
>from djgpp is much larger and suggesting the excutable is slower. I was cheated
by clock(). Any comments?
#include<stdio.h>
#include<time.h>
main()
{
float a,b,c;
long i;
printf("Time start Now: %d\n",clock());
for(i=0;i<5000000;i++)
{a=1.0; b=2.0;c=a+b;}
printf("Time End At: %d\n",clock());
}
size(bytes) of the excutable:
bcc 46802
djgpp 27566 or 34734 (after coff2exe)
output of clock()
bcc Start 0 End 4840
djgpp Start 0 End 384517
Why the excutable generated by bcc gives small number but actually takes
much (much) longer time than one generated by djgpp. Does the small values
actually mean the value is wrapped around ? My PC is a 486 Dx266 notebook
with 4Mb ram, compressed HD.
------------------------------
From: Martin Ambuhl <mam...@ripco.com>
Subject: Re: Question about clock()
Date: Tue, 4 Jul 1995 22:36:04 GMT
j...@sun3.gl.rhbnc.ac.uk (Jim Hu) asks:
> I compiled the program below with both Borland C 4.0 and djgpp (v1.12) with
>no flag at all. The size generated by bcc is larger and run slower compared
>with one generated by djgpp. However, the values printed out by the excutable
>from djgpp is much larger and suggesting the excutable is slower. I was cheated
>by clock(). Any comments?
[code snipped]
>output of clock()
> bcc Start 0 End 4840
> djgpp Start 0 End 384517
> Why the excutable generated by bcc gives small number but actually takes
>much (much) longer time than one generated by djgpp. Does the small values
>actually mean the value is wrapped around ?
The return value from clock() must be converted to seconds by division by
CLOCKS_PER_SEC
bcc:
#define CLOCKS_PER_SEC 18.2
4840 / 18.2 = 265.93 sec
djgpp:
#define CLOCKS_PER_SEC 1000000
384517 / 1000000 = 0.38 sec
* Martin Ambuhl net: mam...@ripco.com
* Chicago, IL (USA) martin...@chessboard.com
------------------------------
Date: Wed, 11 Oct 1995 17:13:31 -0400
From: George Ahlenius <Geo...@aol.com>
Subject: Win 95 Backup Options??
I'm lookling for a backup program that will work with Win95. I've used Norton
Backup for many years and been very satisfied. I called them to see about
upgrading for Win95 and found out that they have to plans at this point to
introduce and new version of their backup program. What have others found
that works better than the MS BAckup that comes with Win95? I'm running a
Colorado 250 tape drive - so I need something that will be compatible with it
too. Has anyone had success with using the new Iomega Zip drives on Win 95?
thankz,
george g ahlenius
------------------------------
From: offe...@einstein.et.tudelft.nl (Aad Offerman)
Subject: Personal Computer CHIPLIST 8.1 part 1 of 5
Date: 18 Oct 1995 12:30:45 GMT
Archive-name: pc-hardware-faq/chiplist/part1
Last-modified: 1995/10/14
Version: 8.1
CHIPLIST 8.1 by Aad Offerman, 18-10-95.
A. Offerman
Bonnweg 40
3137NE Vlaardingen
The Netherlands
010-4745386
Since there are a lot of questions about the differences between the various
chips used in the IBM PC, IBM PC/XT, IBM PC/AT, IBM PS/2 and compatibles, this
list, containing their CPUs and NPXs, has been compiled for the benefit of
the net community. I hope it can answer some questions.
This list is the result of collecting many snippets of information from
USENET News and data books. Furthermore, various contributors and others have
helped to make this list to what it is today. Thank you all.
Any corrections, additions, or comments are welcome. Please reply by E-mail
to:
offe...@einstein.et.tudelft.nl
This list is cross-posted about once every month to the following newsgroups:
comp.sys.ibm.pc.hardware.chips
comp.sys.ibm.pc.hardware.systems
comp.sys.ibm.pc.hardware.misc
comp.ibm.pc.hardware
comp.sys.ibm.pc.misc
comp.sys.intel
comp.answers
news.answers
The latest version of this list can also be obtained from:
rtfm.mit.edu /pub/usenet/news.answers/pc-hardware-faq/chiplist/
ftp.twi.tudelft.nl /pub/texts/chiplist/chiplist.asc
A WWW HTML version of the latest chiplist is available at:
http://einstein.et.tudelft.nl/~offerman/chiplist.html
Contents:
1 Introduction
1.1 Identification
1.2 Packages
1.3 Semiconductor processes
1.4 JEDEC (Joint Electronic Device Engeneering Council)
1.5 Manufacturers
1.5.1 Intel
1.5.2 AMD (Advanced Micro Devices)
1.5.3 IBM (International Bussiness Machines)
1.5.4 Chips & Technologies
1.5.5 Cyrix
1.5.6 Texas Instruments
1.5.7 IIT (Integrated Information Technology)
1.5.8 Motorola
1.5.9 Apple
1.5.10 HP
1.5.11 DEC (Digital Equipment Corporation)
1.5.12 Renaissance Microsystems Inc.
1.6 Literature
[ A listing of some 250 different variants on the 386/486 chips
deleted...]
1.1 Identification
Manufacturer: name and/or logo.
Part number.
Revision number, step level.
Date: often the week number and the year of manufacturing.
Memory chips: capacity: 64, 256 kbit,
1, 4, 16 Mbit,
speed: 10, 15, 20, 40, 60, 70, 80, 100, 120, 150 ns.
Orientation: indicated by a hole or a dot; from this indication the pin
numbering starts contra clock-wise with number 1.
For microprocessors at boot the chip mask revision number is often left
in one of the control registers.
In the newer SL enhanced Intel i80486 CPUs (if bit 21 in EFLAGS can be
toggled) and the Intel Pentium CPUs a CPUID instruction is available:
EAX=0: EAX: highest input value recognized by CPUID
EBX-EDX: vendor ID string: Intel: "GenuineIntel"
AMD: "AuthenticAMD"
Cyrix: "CyrixInstead"
UMC: "UMC UMC UMC"
EAX=1: EAX: bit 0-3: step level
bit 4-7: model
bit 8-11: family: 4: 486,
5: Pentium
bit 12-31: reserved
EBX-ECX: reserved
EDX (feature bits): bit 0: on-chip FPU
bit 1-6: I/O Breakpoints available
Page Size extensions (single-level page
table with 4 Mbyte pages)
Time Stamp Counter available (RDTSC)
Machine Specific Registers available
(RDMSR/WRMSR)
bit 7: Machine Check Exception
bit 8: CMPXCHG8B instruction
bit 9-31: reserved
1.2 Packages
DIP (Dual In-line Package): o o o o o o o o
o o o o o o o o
CERDIP (CERamic Dual In-line Package).
PQFP (Plastic Quad Flat Package): surface mounted.
SQFP (Shrink Quad Flat Package): surface mounted, thermally enhanced.
PLCC (Plastic Leaded Chip Carrier).
PGA (Pin Grid Array): o o o o o o o o
o o o o o o o o
o o o o
o o o o
o o o o
o o o o
o o o o o o o o
o o o o o o o o
ZIP (Zigzag In-line Package): o o o o o o o o
o o o o o o o o
DRAM (Dynamic Random Access Memory): 4116 16 k x 1 (1980),
4164 64 k x 1 (1982),
41256 256 k x 1 (1984),
411000 1 m x 1 (1987, 1988).
SIMM (Single In-line Memory Module) (Wang): contains a complete RAM
bank. MAC SIMMs are only 8 bits wide; they don't contain a parity bit.
However, there are Personal Computers around in which the RAM chips for
parity checking are build-in on the motherboard, that need 8 bit SIMMs.
9-chip SIMM: 9 chips of 1 bit wide
8-chip SIMM: 8 chips of 1 bit wide (MAC)
3-chip SIMM: 2 chips of 4 bits wide and 1 chip of 1 bit wide
3 chips of 3 bits wide
2-chip SIMM: 2 chips of 4 bits wide (MAC)
If the correct refresh is supplied SIMMs with a different number of
chips and different speed can be used together.
SIP (Single In-line Package): contains a complete RAM bank.
The orientation of SIMMs and SIPs is indicated by a hole. Starting from
this indication the numbering of the pins starts with number 1. Apart
from the pins there is no difference at all between SIMMs and SIPs.
The normal SIMMs and SIPs have 30 pins/pads. There are also 36 pin SIMMs and
SIPs. The extra pins are used for speed detection by the motherboard.
There are also 72 pin SIMMs. These are 32 bits and 4 parity bits wide. 4 pins
are assigned for speed detection. They are mostly used in newer Personal
Computers.
Capacity: 1, 2, 4, 8, 16 Mwords.
DIMM: 64 bit memory module.
1.3 Semiconductor processes
RTL (Resistor-Transistor Logic): SSI (Small Scale Integration).
DTL (Diode-Transistor Logic): SSI.
TTL (Transistor-Transistor Logic) (Texas Instruments, 1965): bipolar,
SSI, MSI (Medium Scale Integration), LSI (Large Scale Integration).
7400 series: 0 - 70 C.
5400 series: -55 - 125 C (military).
5400, 7400: 10 ns propagation time,
54L00, 74L00: Low power: higher resistances, less dissipation: longer
propagation time,
54H00, 74H00: High power: lower resistances, more dissipation: less
sensitivity for noise,
54S00, 74S00: Schottky-clamped: faster switching by using Schottky diodes
to prevent the transistors from saturation,
54LS00, 74LS00: Low power, Schottky-clamped,
54AS00, 74AS00: Advanced Schottky: faster switching, less dissipation,
54ALS00, 74ALS00: Advanced Low power Schottky.
I2L (Integrated Injection Logic) (1972): bipolar,
LSI, VLSI (Very Large Scale Integration).
Vcc: 0.8 V.
Propagation time: 20 - 50 ns.
Speed-power: 0.5 pJ.
ECL (Emitter Coupled Logic, Current Mode Logic): bipolar.
Propagation time: 0.5 - 2 ns.
Dissipation: 3 - 10 times higher than TTL.
MOS (Metal Oxide Semiconductor): FET (Field-Effect Transistors).
Maximum frequency: 25 MHz.
PMOS (Positive-channel MOS): LSI, VLSI.
NMOS (Negative-channel MOS): LSI, VLSI.
Faster than PMOS.
HMOS (High performance n-channel MOS): LSI, VLSI.
CMOS (Complementary MOS): LSI, VLSI, ULSI (Ultra Large Scale Integration).
Better current management combining n- and p-channels.
Originally slower than NMOS.
CMOS-SOS (Silicon On Sapphire).
Low capitance.
100 MHz.
Developed by military for radiation hardness in space and tactical/strategic
nuclear warfare environments.
For a long time 0.6 micron geometries were thought to be a limit imposed by
the electron microscopes used for mask alignment, but then the X-ray
lithography was invented...
1.4 JEDEC (Joint Electronic Device Engeneering Council)
JEDEC was first known for their DIP definitions for memory chips.
JEDEC has suggested a new standard of 3.3 V for all electronic components,
including CPUs. CPUs operating at 3.3 V consume less than 50 % of the power
of their 5 V equivalents. Intel currently uses a manufacturing process with a
resolution of 0.8 micron, but is starting production with a 0.6 micron
process. This produces chips that can only operate reliably at 3.3 V, which
means that all its future CPUs are likely to operate only at this lower
voltage.
1.5 Manufacturers
1.5.1 Intel
The company was founded in 1968 by Gordon Moore, currently the chairman, and
the late Bob Noyce. The original name was M & N Electronics, but was changed
to Intel (Integrated Electronics).
Intel makes the base models: i8086/i8088, i80286, i80386, i80486, Pentium,
i8087, i80287, i80387.
iapx stands for Intel Advanced Processor architecture.
Intel lost its claim to the `386' and `486' trademarks, which is why the
Pentium is not called the `586'.
Currently, Intel is fighting to protect its various patents and its copyright
of the 386 and 486 microcode. The legal situation is complicated by various
license agreements made by Intel in the past.
SMM (System Management Mode) can be used to manage the CPU's power demands.
When a CPU enters SMM it saves its current state in a special memory area,
SMRAM (System Management RAM) and then runs a program, also stored in in
SMRAM, the SMM handler. Static core is necessary.
SMM is implemented in all Intel i...SL CPUs. In June 1993, Intel announced
it was discontinuing its SL range and instead making all its current
processors SL enhanced. Intel has also introduced an Auto Idle state for its
clock doubled CPUs: the internal clock can be dropped down to the external
clock speed while the processor is waiting for data, returning to full speed
as soon as the data arrives.
In February 1994 Intel opened its $750,000,000 costing Fab 10 in Leixlip,
Ireland. There the 0.6 micron CMOS Intel i80486DX4 CPU and Intel Pentium CPU
series are produced. In the future the Intel P6 CPU and Intel P7 CPU series
will be produced here too.
Intel has agreed to invest $7,000,000,000 in Ireland over the next five years.
In June 1994 Intel and Hewlett-Packard agreed to develope a new 64 bit RISC
CPU together (Intel P7 CPU / HP PA9000 CPU). The CPU will be based on the HP
Precision Architecture (PA) and be able to emulate the Intel X86 architecture.
Together the both companies will invest $1,000,000,000 in the development of
the new CPU.
Intel fax-back service: 1-800-628-2283.
Intel WWW server: www.intel.com
Intel FTP site: ftp.intel.com
1.5.2 AMD (Advanced Micro Devices)
AMD holds a second source license which dates back to the 8086. In the early
days mainframe companies had a rule that no chip would be used in a design,
unless it could be bought from at least two companies.
AMD invented a CMOS process that was faster than Intel's and vendors started
using them as a primary source.
DEC will manufacture 486 chips for AMD, increasing AMD's production.
In October 1994 TSMC agreed to produce AMD Am486 CPUs for AMD in its
0.5 micron technology. The production of AMD Am486DX4 CPUs in Taiwan will
start in the third quarter of 1994.
In January 1995 Intel and AMD cancelled all pending lawsuits against
each other. AMD can keep on using the 386 and 486 microcode, but not those of
the later CPUs.
AMD European Corporate Applications Technical Hot-Line Support:
euro...@amd.com
euro...@amd.com
AMD WWW server: www.amd.com
AMD FTP site: ftp.amd.com
1.5.3 IBM (International Business Machines)
Jack Kuehler, Armonk.
IBM's licensing arrangements with Intel preclude them from selling
their CPUs directly. They can only sell these CPUs as long as they are
sold with a minimum amount of `added value'. IBM is not allowed to
produce any FPUs.
From September 1993 IBM is manufacturing the Cyrix 486 CPUs in their
0.5 micron CMOS technology. In the future they will also produce the
Cyrix M1 CPU.
IBM WWW server: www.ibm.com
1.5.4 Chips & Technologies
George Taylor.
Founded in 1984 by Gordon Campbell.
Chips & Technologies has dropped its development of X86 clones.
1.5.5 Cyrix
Cyrix implemented the chips they wanted to manufacture from the
specifications of the originals (clean room). They had Texas
Instruments produce these chips for them. A certain number was going to
Cyrix to be resold, and the rest was sold by Texas Instruments
directly.
From September 1993 IBM is manufacturing the Cyrix 486 CPUs and in the
future they will also produce the Cyrix M1 CPU.
Cyrix WWW server: www.cyrix.com
Cyrix fax-back service: 1-800-46-CYRIX (1-800-462-9749).
1.5.6 Texas Instruments
Texas Instruments used to be Cyrix's major producer (SGS-Thomson was
the other one). In 1994 Texas Instruments stopped producing chips for
Cyrix and now make their own chips under license from Cyrix. Texas
Instruments has rights to make modifications to these chips.
TI FTP site: ftp.ti.com
1.5.7 IIT (Integrated Information Technology)
1.5.8 Motorola
George Fisher.
Motorola WWW server: www.mot.com
1.5.9 Apple
Michael Spindler.
1.5.10 HP
HP WWW server: www.hp.com
HP FTP server: ftp.hp.com
1.5.11 DEC (Digital Equipment Corporation)
DEC WWW server: www.dec.com
1.5.12 Renaissance Microsystems Inc.
Gordon Campbell.
Developping PowerPC clones.
1.6 Literature
Andrew S. Tanenbaum: Structured Computer Organization (Prentice-Hall)
A.J. van de Goor: Computer Architecture and Design (Addison-Wesley)
William Stallings: Computer Organization and Architecture (MacMillan)
John L. Hennessy & David A. Patterson: Computer Architecture, a Quantitative
Approach (Morgan Kaufman)
Norbert Juffa: Performance Comparison Intel 386DX, Intel RapidCAD, C&T 38600DX,
Cyrix 486DLC (USENET News)
Norbert Juffa: Everything you always wanted to know about math coprocessors
(USENET News)
CPU Info Center:
http://infopad.eecs.berkeley.edu/CIC/
Internet Microcontroller/Microprocessor/CPU Directory:
http://www.cera.com/micro.htm
Jaap van Ganswijk: Chip Directory:
http://www.xs4all.nl/~ganswijk/chipdir/
Intel Secrets: undocumented Intel information:
http://x86.metronet.com/undoc/UndocumentedIntel.html
Compiled, Copyright 1993, 1994, 1995, by A. Offerman. Permission to
use, copy or distribute this document in a non-commercial way for
non-commercial use is hereby granted, provided that this copyright and
permission notice appear in all copies. All other rights reserved.
This document is provided "as is" without expressed or implied warranty.
The specific products and their respective manufacturers are not to be taken
as endorsements of, nor commercials for, the manufacturer.
------------------------------
From: offe...@einstein.et.tudelft.nl (Aad Offerman)
Subject: Personal Computer CHIPLIST 8.1 now on WWW
Date: 18 Oct 1995 13:22:55 GMT
Hello,
The HTML version of the latest Personal Computer CHIPLIST, version 8.1, is now
available on WWW. Take a look a it:
http://einstein.et.tudelft.nl/~offerman/chiplist.html
Enjoy.
Greetings, Aad
------------------------------
Date: Sat, 28 Oct 1995 01:53:08 GMT
From: Martin Ingram <min...@clas.ufl.edu>
Subject: Re: WARP IBM DIALER
In <46nff7$f...@panix.com>, gch...@panix.com (George Henry) writes:
>
>Looking for a better Dial Other Dialer (v1.16) I came across Beta153.zip
>(sp?) at ftp.ibm.net/pub/advantis. This seems to have eliminated the
>hi-speed protocol negotiating problem I had.
George,
It seems to have moved could you ftp the zip file to me at
ftp.clas.ufl.edu/pub/mingram. Just log in anonymously.
thanks
Martin Ingram
Dept. of Political Science
Min...@polisci.ufl.edu
------------------------------
Date: Mon, 30 Oct 1995 08:57:52 GMT
From: n...@smsltd.demon.co.uk
Subject: NASI Support
In message Snuf...@kew.com writes:
> ... I also have a modem server that supports Novell's NASI, and
> DOS's INT-14 modem calles.
> Has anyone written a modem driver for UUPC that will recognize these two
> services? I'd like to have the UUPC server use the MODEM server.
I have written a NASI version which I put into 1.11Q. I didn't need to update
to 1.12 so you'll need to upgrade it to the latest UUPC yourself. Let me know
if you'd like a copy. You need to have the NASI developer's kit as well.
Regards,
--
Nigel Horne, Technical Director SoftCare Media Systems Ltd.
Internet: n...@smsltd.demon.co.uk; Fidonet: Nigel Horne @ 2:2502/21.10;
Packet: G0LOV@GB7SYP.#19.GBR.EDU; Phone: +44-1226-283021.
------------------------------
Date: Mon, 30 Oct 1995 14:05:22 +0100
From: ste...@pink.allcon.com
Subject: Problems with UUPC on TCP/IP-connection
Hi,
I want to set up a UUPC connection with TCP/IP using a SLIP-network.
This works fine, except login on uucp-port. I always got the
error-messages like these:
===
Write:
Read: login:
Write: LOGIN
Read: login: Password:
Write: PASSWORD
OOOOOO OOOOOO
Trace complete at Mon Oct 30 14:03:39 1995
===
My systems-file looks like this:
allcon Any tcpip 16800 haegar.allcon.net get "" "" ogin:--ogin: LOGIN\m\n
ssword :--ssword: PASSWORD\m
The login-sequence should be:
login: LOGIN
Password: PASSWORD
What is wrong with my systems-file ? I think the chat-script is wrong, but
how do I have to change it ?
Stefan
* ste...@pink.allcon.com * http://w3.allcon.net/os2/usergroup/ *
Flensburg *
------------------------------
Date: Tue, 31 Oct 1995 08:03:58 +0200
From: s...@silver.wcape.school.za
Subject: GUI Mailreader for UUPC
On 30 Oct 95 at 18:21, wier...@xroads.com <wier...@xroads.com>
wrote:
> If any of you would like to join efforts, let me know. I'm not in this for
> any other reason than to get my problem solved (find a decent GUI mailer
> that's EASY to use and works with UUPC).
There's also WinPMail (Pegasus Mail), which works splendidly with
UUPC. THURN is a derivative of Mike Lawrie's SNUUPM that automates
the setup of UUPC & PMail / WinPMail with the interfacing bits
required, and the latest version is available as
ftp://ftp.wcape.school.za/pub/msdos/uucp/thurn04b.zip
or by email to majo...@wcape.school.za with the message
get files thurn04b.zip.uue
Stephen
---
Stephen Marquard, s...@silver.wcape.school.za
12 Silverdale, Pinelands 7405, Cape Town, SA
------------------------------
Date: Tue, 31 Oct 1995 15:30:08 -0500
From: Austin Brooks <acbr...@southern.edu>
Subject: Help! Going to WinNT
Dear Fellow Power Users,
I need a little help. We have a Pentium 100 with 64MB of RAM, two
SCSI hard drives for a total of 13 SCSI Gigabytes (for storage), a
primary IDE 1GB hard drive for all of our programs, a Matrox MGA
Impression Plus that is OpenGL compatible and 3D accelerated with 4MB
VRAM, a TrueVision TARGA 2000 PCI audio/video capture/playback card, a
NEC 6Xi internal 6-speed CD-ROM drive (which we are very happy with),
and SoundBlaster 16. We made the unfortunate mistake of putting
Windows95 on this machine to help things move faster, and we've
regretted it ever since (if you want my Win95 pro/con list, write
back). Win95 crashes just about every 10 minutes when we do heavy
processor-draining stuff like video capture and large image editing.
It's just too unstable, so we would like to move up to WinNT 3.51 (or
whatever the latest is, ignoring the soon-coming 4.0). This particular
machine is a single, stand-alone computer with absolutely NO networking
capabilities at all, so WinNT will have to be sensitive about this.
But here's what we need it to do. I'm making sure it will do this
stuff because I have no experience with WinNT.
* Run DOS, Win 3.1, Win32s, Windows95, and WinNT applications
* Run with DOS and Win 3.1 drivers (for sound, hard drives, etc.)
* Be compatible with the above hardware description
Is WinNT Workstation the OS we need for a single computer that has no
future plans of being networked in any way? Do you have any
recommendations to help things move along? Any pitfalls I should be
aware of? I'm a Windows 3.1 programmer, but I have no WinNT
experience, so I need to know a lot.
Well, thanks for your time. We hope to have this thing running as soon
as possible.
--ACB
------------------------------
Date: Wed, 1 Nov 1995 00:24:15 -0500
From: Patrick Hoepfner <hoep...@intr.net>
Subject: Re: Clip X
> There is a program called Clip X for Windows. Is there any program
> similar for the Mac?
Guys,
It would be a little helpful if you would tell us what Clip-X is or what
it does. I am not familiar with that application on the PC.
-- Pat
hoep...@intr.net
------------------------------
Date: Fri, 3 Nov 1995 22:57:53 -0500
From: Michael Rubin <ABLAC...@aol.com>
Subject: Reverse sort order
Hi,
A short while ago someone discribed how to make a listing in windows go
from z to a instead of a to z and how this same command would
reverse order the listing if sorted by date, alphabetical etc. I
changed one of my computers and have not used for quite a while and now
can't remember how to resort it! Does anyone know how to do this?
Thanks
Mike
ablac...@aol.com
------------------------------
From: mar...@pi.net
Date: Sat, 4 Nov 1995 13:51:55 +0000
Subject: Where do I send questions?
Dear Gregory,
When I have questions, to which Email address do I send them??
Thanks,
Marcus Bakker
mar...@pi.net
------------------------------
Date: Tue, 7 Nov 1995 11:06:23 +0000
From: ssj <s...@talon.net>
Subject: Re: Using WIN-OS2 TCPIP under Warp
> Is there a way of running Windoze programs requiring TCP/IP under Warp,
> connected with the IAK?
I run Pegasus Mail/WinVN newsreader and mIRC chat under OS/2 and all
are Windows based.
I use the Dial Other Service Providers program in the IAK, then added
the following line to the autoexec.bat file:
SET ETC=C:\TCPIP\DOS\ETC
and make sure \TCPIP\DOS\BIN is in your path statement.
I have yet to try Netscape using this method, but I can tell you that
all the other Windows based Internet programs I tried worked fine
with this method.
Scott
s...@talon.net
Talon-net! Call 610-670-4931 Tell them Scott sent you!
[Team OS/2-Philadelphia]
------------------------------
Date: Wed, 08 Nov 1995 00:18:19 -0500
From: uupc...@kew.com
Subject: Re: New Email Notification for DOS.....
On Tue, 07 Nov 95 17:56:10 GMT, Ba...@airod.po.my wrote:
> I am using the E-Mail system on a LAN Novell Network... It work great but
> how can I notify the login user that they have a new mail coming? Is there
> a small program to check the mailbox for newmail and then notify the user?
> Preferable non-TSR program.... Thanks.....
For DOS, use options=multitask and the WAITING program. For Windows,
use WinBIff. We don't maintain the latter, but a new version is loaded
on our listserv ...
--
Drew Derbyshire UUPC/extended e-mail: soft...@kew.com
Telephone: 617-641-3452
------------------------------
Date: Wed, 08 Nov 1995 09:08:51 -0500
From: Soft...@kew.com
Subject: uupcdll and NT build
Windows NT refuses to build the DLL required by NNS. It reports that
it can't open UUPCDLL.EXP, when in fact it does create it (as an empty
file). I have no idea why.
My choices, are to now ship 1.12p this morning, punt the NT release, or
delete the one file from the release. I have chosen to do the latter.
I'll add the file back in as soon as someone can tell me what the
problem is. (At this, my primary thought is that MS has once again
trashed me with their lousy tools, and so I abandon the hunt myself.)
Drew Derbyshire UUPC/extended e-mail: soft...@kew.com
Telephone: 617-641-3452
Q. What machine does Windows NT run best on?
A. A 35 mm slide projector.
------------------------------
Date: Wed, 08 Nov 1995 09:42:09 -0500
From: Soft...@kew.com
Subject: 1.12p
UUPC/extended 1.12p has been loaded to kewgate, and is partially loaded
to ftp.clarkson.edu. I expect it to be fully loaded to the latter
location by noon eastern time.
This include new documents (all formats, including ASCII and
PostScript), and executables for all platforms. Three notes:
The UUPCDLL.DLL used by NNS did not build. You should be able
to use the one from 1.12n until we can build it.
The documents are at the gallary proof stage, and will be
further updated. We're still pretty proud of them.
The sample files have not been updated. I need to do a complete
review of them.
A full summary of changes since 1.12b, the last time we had complete
docs, follow.
--
Drew Derbyshire UUPC/extended e-mail: soft...@kew.com
Telephone: 617-641-3452
------------------------------
Date: Wed, 8 Nov 1995 07:48:15 CST
From: Chad Lumpkin <ch...@mails.imed.com>
Subject: Shiva PPP and Win-OS/2
I'm really upset about this one! I had just recently gotten my
windoze internet apps to work with my OS/2 PPP connection. Tuesday I
got a copy of Netscape 1.1 personal edition and installed it in native
DOS/WIN. Everything went fine and I didn't think anything about it.
NOW when I'm in OS/2 and try to run a winsock app i.e. mIRC Netscape
etc. I get the infamous "Unable to Initialize Network Layer" message.
I have not changed any settings in my win-OS/2 settings. The only way I
have found to run them is to run my Trumpet winsock PPP and then I can
use them in a win-OS/2 session but, of course, then I can't use my OS/2
apps. The Shiva PPP dialer that came with Netscape will not even work
in an win-OS/2 session. Does anyone know why I might be having this
problem. I really would like to be able to run my internet apps for
windoze with the OS/2 PPP connection again. TIA
"Damn the windoze, Warp speed ahead!"
Chad Lumpkin
Sr. Electronic Technician
Intermedics Inc.
4000 Technology Dr.
Angleton, Texas 77515
e-mail: home <cha...@hic.net> work <ch...@imed.com>
------------------------------
Date: Wed, 8 Nov 1995 16:19:43 GMT
From: Ch.Lech...@jk.uni-linz.ac.at
Subject: Re: The bootp problems
ged...@uxa.ecn.bgu.edu (Richard Hinton) writes:
> I have an Internet provider that uses System V release four
>OS-2 IAK uses a binary "bootp" file, while the Unix box has its
>[...]
>own bootp sequence which is initiated by each micro which is
>dialing up. Any constructive suggestions would be appreciated.
BOOTP is an basically always an executable.
> My version of Trumpet Winsock has several scripts, two of which
>are directly responsible for making a connection to the Internet. The
>first script (login.cmd) dials the modem, sends the username, password,
>and then issues the SLIP command. After this operation the login script
>terminates. The host computer sends an initial IP address, a reference
>to the MTU size, and a note about "header compression" matching my
>system.
You really have to use and perhaps adapte annex-scripts.
But you will need the latest version of the Dialer. Updates lie on
ftp://ftp.ibm.net
Forget any non-OS/2-Slip/PPP-Software for use under OS/2 ! TCP/IP is,
in OS/2, UNIX, ..., part of the operating system.
greetings Christoph, under Warp Connect
Name: Christoph Lechleitner
EMail: Ch.Lech...@jk.uni-linz.ac.at
Snail-Mail: Kugelfangweg 11 b, A-6063 Rum, Austria, Europe
Phone: +43/512/269115
------------------------------
Date: Thu, 9 Nov 1995 10:43:09 -0600
From: Mike Vlasman <Mike_V...@mbnet.mb.ca>
Subject: EDO RAM, Triton boards and UARTS
Timothy,
A few days ago you asked about:
Pipline burst mode cache / what increment are available (256 or 512k?)
EDO ram
Intel Triton Chipset for PCI pentium motherboards
High speed serial ports
I've dragged these tidbits from my files. I hope that they help.
EDO RAM and VIDEO
Memory Bus Width/Peak Bandwidth (MBPS)/Cost for 2MB ($US)/Who uses it
64-bit DRAM 200 $45 Chips & Technologies
64-bit EDO RAM 320 $47 Chips & Technologies, ATI Technologies, S3
64-bit SDRAM 530 $49-$53 Chips & Technologies, Number Nine, Tseng Labs
Two 8-bit channels of RDRAM 1000$49-$53 Cirrus Logic, Silicon Graphics
64-bit MDRAM 800 $49-$53 Trident, Tseng Labs
64-bit WRAM 800 $65 Matrox Graphics, Trident
64-bit VRAM 600 $68 S3, ATI Technologies
DRAM = Dynamic RAM
EDO = Extended Data Out
SDRAM = Synchronized DRAM
RDRAM = Rambus RAM
MDRAM = Multibank DRAM
WRAM = Windows RAM
What the numbers mean: for about $10 more per video card, new memory
architectures achieve a performance increase of about 400% over
straight 32-bit DRAM boards. EDO RAM and SDRAM are popular and look
like the low-cost winners. BYTE Faster Graphics Cards on the Horizon"
April 1995 vol 20 #4:24
Triton Mobo and THE PCI CHIPSET
The Pentium processor communicates with its PCI peripheral devices
through a special interface chipset, and the design and performance of
this chipset can greatly impact the performance of a computer*s PCI
bus.
Most 5-volt 60 and 66 MHz Pentium processor motherboards use the
older Intel "Mercury" chipset. Most of the 3.3-volt 90 and 100 MHz
motherboards use Intel*s newer "Neptune" PCI chipset, which is much
faster than the older Mercury chipset. And in mid-1995 Intel will
introduce motherboards based on the latest *Triton* PCI chipset, which
is even faster than the Neptune.
Finally, it is best to avoid motherboards that feature both PCI and
VLB slots. This design forces the use of a slower PCI/VLB "bridge"
chipset, which distinctly limits the speed of the PCI bus.
UARTs
To check what type of UART is installed in your computer, follow these
steps:
1. Exit Windows.
2. Run Microsoft's MSD (Microsoft Diagnostics) utility program. To do
so, run C:\DOS\MSD at your DOS prompt.
3. Select the Com Ports... option.
4. The last line of the information displayed is the UART Chip you are
using.
Follow this chart to determine the modem speed you should use,
depending on the UART your computer uses:
UART Recommended Modem Speed
8250 9600bps
16540 9600bps
1655 14.4Kbps
16550a 14.4Kbps
16550af 14.4Kbps
If you run at a modem speed higher than recommended, data loss and
subsequent connection problems may result.
Good luck
Mike
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End of Info-IBMPC Digest V95 #170