Set DMA = low
Wait for BA == high
Set A0-A15 + D0-D7
Set R/W = low
Other signals that one need to pay attention to?
Dot clock
Phase2 clock
How many bytes at a time can one push?, considering that dram refresh has to
be executed. Ofcourse video chip (VIC-II) may want the bus too, but it can be
shutoff I suppose. Just like when loading from tape.
But only when phase2 is low, and AFAIK only at the begin of a machine cycle.
IIRC you can only use DMA in practice when the start of the DMA transfer is
under the 6510's control (as it is with the REU, and with the Z80 cartridge,
for example).
> Wait for BA == high
> Set A0-A15 + D0-D7
> Set R/W = low
>
> Other signals that one need to pay attention to?
> Dot clock
> Phase2 clock
Well, considering that all DMA does is halting the processor, you'll only have
access to the bus during the high phase of phase2, as the bus is still owned
by the VIC when phase2 is low.
> How many bytes at a time can one push?, considering that dram refresh has to
> be executed.
The DMA device "owns" the bus as long as you keep DMA asserted, under certain
conditions. Memory refresh happens during the VIC access of the bus, when
phase2 is low. When the VIC wants the bus for video access (during badlines,
etc), it will release BA.
The bus is yours and yours only as long as BA is asserted, and phase2 is high.
Remember that this whole DMA thing is also used by the Z80 cartridge (And
I assume the SCPU as well) to replace the 6510; there's no limit in how long
you can claim the bus, as long as you pay attention to the VIC timing.
You could find some inspiration on pages like
http://www.baltissen.org/htm/pccard.htm
> Ofcourse video chip (VIC-II) may want the bus too, but it can be shutoff I
> suppose. Just like when loading from tape.
It can't be shut off completely. All you can do is prevent the VIC from
stealing "your" cycles, in which case you don't have to pay attention to
BA during your transfer. But it'll still claim the bus when phase2 is low.
--
Martijn van Buul - pi...@dohd.org - http://www.stack.nl/~martijnb/
Geek code: G-- - Visit OuterSpace: mud.stack.nl 3333
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Martijn van Buul schreef:
> > Set DMA = low
>
> But only when phase2 is low,
That should be 'only when phase2 is High'.
> You could find some inspiration on pages like
>
> http://www.baltissen.org/htm/pccard.htm
Hmmm, the schematic is missing :( I'll try that to fix this evening.
Sorru for the inconvenience.
Groetjes, Ruud
Sorry, that is not entirely correct either.
Better have a look at http://www.baltissen.org/htm/c64_cpm.htm where
you can see how the Z80 is connected to the C64. In this case the Z80
also performs a kind of DMA, seen from the view of the 6510. And here
you can see that DMA is activated by a simple I/O operation. In this
case DMA is (re)set at the falling edge of Phi2.
Groetjes, Ruud
This immediatly takes control of the bus. Bad.
> Wait for BA == high
The way I worked out, and i am willing to accept it may be wrong, is.
Watch the BA line. When the VIC requests access, it will let you know via
BA.
Count three clock cycles (Like the VIc does), and pull the DMA line.
Wait for VIC to release BA, then its all yours.
If you pull DMA, it decouples the address and data lines from the CPU, it
does not allow the three clock cycles to pass like the VIC can (The VIC has
seperate access to the RDY and AEC pins, the DMA line pulls both at the same
time).. This is fine assuming you want the 6510 to crash or can use the 6510
to syncronise (ie, to activate the z80 ZPM cartridge the 6510 writes to a
register and starts excecuting safe NOP op codes).
As you need to monitor the BA line anyway, you may as well use it to start
your DMA activity.
Wait for PHI2==high + BA==high
Set DMA==low
Repeat while PHI2==high + BA==high
Set A0-A15 + D0-D7
Set R/W = low (mainly want to transfer to C64)