6502 BIT instruction

[Paul Förster]

Hi,

I'm trying to polish up my machine language knowledge a little and ran
over a rarely used instruction, the BIT instruction.

It copies bits 6 and 7 from it's memory argument's contents to the N
and V flags and sets the Z flag depending on the result of ANDing A
with M. So far, so good.

Let's say M=$0a. So whenever bits 1 _or_ 3 are set, Z will become 0.
What bothers me is the "or" in the previous sentence. Shouldn't Z be 0
only, if bits 1 _and_ 3 are set? This confuses me. It just shows that
at least one bit matches but does not allow checking all bits without
the usual cmp overhead.

If I got that right, then to me it's no wonder it's so rarely used.

Or did I get something wrong here?
--
cul8er

Paul
paul.f...@gmx.net

[rusure]

On Monday, March 10, 2014 2:46:14 PM UTC-6, Paul Förster wrote:
> Hi,
>
> I'm trying to polish up my machine language knowledge a little and ran over a rarely used instruction, the BIT instruction.
>
> It copies bits 6 and 7 from it's memory argument's contents to the N and V flags and sets the Z flag depending on the result of ANDing A with M. So far, so good.
>
> Let's say M=$0a. So whenever bits 1 _or_ 3 are set, Z will become 0.
>

> What bothers me is the "or" in the previous sentence. Shouldn't Z be only, if bits 1 _and_ 3 are set? This confuses me. It just shows that at least one bit matches but does not allow checking all bits without the usual cmp overhead.

>
> If I got that right, then to me it's no wonder it's so rarely used.
>
> Or did I get something wrong here?
> --
> cul8er
>
> Paul

> Internet handle paul.foerster ISP gmx.net

The only times I have used the BIT command is for testing bit 7 of a memory location. As you state, the BIT command controls the Negative flag based on the value of bit 7 of the location. It seems that I could just as easily test for the contents of bit 6 of a memory using the BIT command. In other explanations, the advantage of using the BIT command for testing bits 6 and 7 is that none of the processor registers need be changed to perform these tests. For using the BIT to store the results of a test in the Zero flag, the value of the accumulator must take on a required value, based on the kind of test to be performed. The advantages of the BIT command are lost when it stores the test results in the Z flag.

Like you, I am confused by the BIT command and the Z flag. I have problems with the WAIT command in BASIC as well. I just don't use it. Nor do I use the BIT command and the Z flag either.

[hl351ge]

The behaviour is consistent. The operation done, as correctly stated, is
A AND M. The difference to the AND operation is that the result is not
stored in A, but only flags are set.

The point is that AND / BIT work on a full byte, bit-by-bit.
If b[i] denotes the bit #i in a byte, the oeration for BIT is:
for (i=0; i<8; i++)
temp[i] = A[i] & M[i];
N = temp[7];
OV = temp[6];
Z = (temp == 0);
AND compared to that just adds a
A = temp;
afterwards.

BIT is *not* the AND operation applied on the vector of bits in the
byte, such as
temp = 1;
for (i=0; i<8; i++)
temp = temp & (A[i] & M[i]);
Z = temp == 0;

Thus, there is the wrong implication that because of an AND operation
happening, it looks wrong as the if there were an OR operation between
bits in progress.

-hl

[Hg]

By strange coincidence I was browsing Codebase64 today for the first
time in months and I came across a real world application for the BIT
opcode on the very first page I visited -

http://codebase64.org/doku.php?id=base:quick_exit_from_interrupt


--
T

[Paul Förster]

Hi Hg,

On 2014-03-11 13:03:47 +0000, Hg said:
> http://codebase64.org/doku.php?id=base:quick_exit_from_interrupt

quite interesting, thanks. :)
--
cul8er

Paul
paul.f...@gmx.net

[Paul Förster]

Hi hl,

On 2014-03-11 08:21:16 +0000, hl351ge said:
> The behaviour is consistent. The operation done, as correctly stated,
> is A AND M. The difference to the AND operation is that the result is
> not stored in A, but only flags are set.
>
> The point is that AND / BIT work on a full byte, bit-by-bit.
> If b[i] denotes the bit #i in a byte, the oeration for BIT is:
> for (i=0; i<8; i++)
> temp[i] = A[i] & M[i];
> N = temp[7];
> OV = temp[6];
> Z = (temp == 0);
> AND compared to that just adds a
> A = temp;
> afterwards.
>
> BIT is *not* the AND operation applied on the vector of bits in the
> byte, such as
> temp = 1;
> for (i=0; i<8; i++)
> temp = temp & (A[i] & M[i]);
> Z = temp == 0;
>
> Thus, there is the wrong implication that because of an AND operation
> happening, it looks wrong as the if there were an OR operation between
> bits in progress.

so, my understanding is right? Z=0 if AT LEAST ONE pattern bit matches,
and not if ALL pattern bits match, otherwise Z=1? This is at least, how
I understand your code (I'm not a C guru, but mostly BASIC, bash and
(PL-)SQL these days). This also matches my testing the BIT instruction.

This is confusing to me. I can understand the usefulness of this. One
can easily check if for example a joystick points north AND/OR east.
But this does not allow checking if the joystick points northeast, i.e.
BOTH bits match at the same time.
--
cul8er

Paul
paul.f...@gmx.net

[hl351ge]

Yes. Any bit set after AND mask applied will result in a non-zero
result: This is Z=0. I think another counter-intuitive effect is that
the flag is named ZERO, but if it applies, the bit is ONE. In contrast:
the NEGATIVE bit is set if the number is negative, i.e. bit is ONE -
this is what was one would expect: it repesents the real situation.

The BIT instruction IMHO was actually not intended to check for multiple
bits. If you like to check for a "northeast" pattern, you would need a
AND mask and a CMP afterwards, or in a special case where the "north"
bit is bit 7 and the "east" one is bit 6, you could use
BIT, followed by BMI skipping to a BVS - this effectively results in
an AND operation.

Alternatively, you could use an AND #$0a, followed by a XOR #$0a. and
then check on zero (BEQ). But any of these alternatives will destroy
A content. The 65C02 is improved in this way as it has explicit bit
check instructions (BBR, BBS) which generalize the above mentioned
bit7/6 check with BIT.

-hl

[Paul Förster]

Hi hl,

> Yes. Any bit set after AND mask applied will result in a non-zero
> result: This is Z=0. I think another counter-intuitive effect is that
> the flag is named ZERO, but if it applies, the bit is ONE. In contrast:
> the NEGATIVE bit is set if the number is negative, i.e. bit is ONE -
> this is what was one would expect: it repesents the real situation.

I asked my brother about this today. He's a senior C guru and I asked
him about the logic behind this. He knows a lot about bit manipulation
stuff, though he is not familiar with the 65xx CPU series in
particular. He explained the logic behind this to me and why he would
see it as perfectly logical that the Z bit appears reversed to
intuition because it's mathematically correct. I didn't get that at
first and had to think about it. And I'm not sure I fully understood
his explanations completely but I know now what the BIT instruction
does and that's what counts for me. :-)

As a mnemonic I just take it that (given true=0 and false=1), the Z bit
is either true or false, with exactly these values. This is intuitive
enough for me.

> The BIT instruction IMHO was actually not intended to check for multiple bits.

that was the confusing part for me. :) I also couldn't find it being
mentioned in any of the instruction set descriptions available on the
net. The all only mention the "and" part and that bit N, V and Z get
set accordingly, but don't mention how the Z bit is actually processed.
That's why I asked because I was confused at my own test results.
--
cul8er

Paul
paul.f...@gmx.net