Small Page and Tiny Page

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karthikbg

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Jan 12, 2007, 6:45:08 AM1/12/07
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Hi,

I am using a pagetable base addr of 0x20026C0. I have configured for
using Small Pages (that is bits[1:0] = 0b10 ) . But, I find that since
the 4K page size is quite big. So, i am thinking to change the pagesize
to 1K (Tiny Page Concept - bits[1:0]=0b11 ) and use the memory space
efficiently.

But, my application uses 4K till now.

So, what are things that i need to consider if i change the 4K page
size to 1K ?
What are the things that will get effected because of changing the
Small Page concept to Tiny Page ? ( I am using Arm9 Core Processor).

Kindly share your ideas / suggestions.

Thx in advans,
Karthik Balaguru

Paul Gotch

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Jan 12, 2007, 12:08:17 PM1/12/07
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karthikbg <karthik....@lntinfotech.com> wrote:
> So, what are things that i need to consider if i change the 4K page size
> to 1K ? What are the things that will get effected because of changing the
> Small Page concept to Tiny Page ? ( I am using Arm9 Core Processor).

The two things that will change are the size of your pagetables and the use
of the TLB. The pagetables will get bigger due to the need to store more
entries. The second is not so obvious and is that more TLB entries will be
required. So depending on how the program uses memory you may miss the TLB
more often causing a performance loss.

The details of how the TLB and uTLB work and the impact of 4k vs 1k pages
vary between different processors.

-p
--
"Unix is user friendly, it's just picky about who its friends are."
- Anonymous
--------------------------------------------------------------------

John Penton

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Jan 12, 2007, 12:30:31 PM1/12/07
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Paul Gotch wrote:
> karthikbg <karthik....@lntinfotech.com> wrote:
>> So, what are things that i need to consider if i change the 4K page
>> size to 1K ? What are the things that will get effected because of
>> changing the Small Page concept to Tiny Page ? ( I am using Arm9
>> Core Processor).
>
> The two things that will change are the size of your pagetables and
> the use of the TLB. The pagetables will get bigger due to the need to
> store more entries.

I don't believe that this is true (though I can't be certain of this across
all processors). A small (4k) page descriptor must be repeated four times,
and therefore takes as much space as four tiny (1k) page descriptions in the
page table.

> The second is not so obvious and is that more TLB
> entries will be required. So depending on how the program uses memory
> you may miss the TLB more often causing a performance loss.

This is true.

You might like to also bear in mind whether you want your code to be
forwards compatible. ARMv6 and later does not have tiny pages.

John

--
John Penton, posting as an individual unless specifically indicated
otherwise.


karthikbg

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Jan 12, 2007, 7:40:57 PM1/12/07
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I find about Tiny pages in Arm9 Manual.

Regards,
Karthik Balaguru

Paul Gotch

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Jan 12, 2007, 9:05:07 PM1/12/07
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John Penton <john....@arm.com> wrote:
> I don't believe that this is true (though I can't be certain of this
> across all processors). A small (4k) page descriptor must be repeated
> four times, and therefore takes as much space as four tiny (1k) page
> descriptions in the page table.

Coarse second level page tables are 1K in size and can map both large and
small pages. Large pages require 16 replicated entries in the page table.

Your statement is only true if you are using fine second level page tables
which are 4K in size and can map 1K, 4K or 64K pages. In this case the table
entry must be replicated to the size of the page ie 4 times for small pages
and 64 times for large pages.

You can therefore have smaller page tables if you are using small pages and
coarse page tables.

> You might like to also bear in mind whether you want your code to be
> forwards compatible. ARMv6 and later does not have tiny pages.

ARMv6 does have tiny pages but they are only enabled if subpages are enabled
(effectively VMSAv5 compatability mode). Tiny pages are obsolete in
VMSAv6 along with the fine page tables needed to support them.

Having subpages enabled and a page which doesn't have the same access
permissions on all pages can cause the same TLB issues however this depends
on the design of the TLB.

karthikbg

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Jan 16, 2007, 2:59:43 AM1/16/07
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Do you mean to say that ARM926EJ core also does not support Tiny Pages
?
Clarifications required. ( I find in the manual of Arm9 regarding Tiny
Pages :( )

karthikbg

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Jan 16, 2007, 3:34:29 AM1/16/07
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I am not worried about Arm6 as i will be using Arm9 core and upwards
only.
So, I think, changing from 4k to 1k will not make me worry regarding
the subpage effects . (As those isses are present w.r.t Arm6).
Are those issues present w.r.t Arm9 also ?

I think, the source of things to consider will be regarding the modules
that use the memory . (To see if they are dependent on the Pagesizes).

Will changing the pagesizes affect the functioning of devices that use
that memory ?
Could someone here tell me some ways to overcome those problems ?

Laurent

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Jan 16, 2007, 3:41:44 AM1/16/07
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karthikbg wrote:
> I am not worried about Arm6 as i will be using Arm9 core and upwards
> only.

ARM6 is not ARM v6. ARM v6 is an architecture definition while
ARM6 is an implementation of an architecture.

In your case the ARM926 is an implementation of the ARMv5TE
architecture.


Laurent

karthikbg

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Jan 16, 2007, 4:29:41 AM1/16/07
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Thx for that Major Clarification. (So, i need to think about forward
compatibility incase of TInyPages option . Thx).

Karthik Balaguru

karthikbg

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Jan 16, 2007, 4:35:45 AM1/16/07
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But, I am really eager to know the reason for dropping the old way of
Tiny Pages support . Is anyone here aware of the specific reasons ?
Kindly share it.

Laurent

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Jan 16, 2007, 5:39:57 AM1/16/07
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karthikbg wrote:
>
> But, I am really eager to know the reason for dropping the old way of
> Tiny Pages support . Is anyone here aware of the specific reasons ?
> Kindly share it.

As others said, having tiny pages makes less and less sense as
systems have much more memory than before, even embedded ones, and
this will increase pressure on the TLB, resulting in lower
performance.

Only *you* can say if you will really benefit from switching from
4KB to 1KB pages. I think that if you see any benefit in memory
usage going to 1KB page then your processes are really small and
so probably don't need powerful processors that don't support
them.


Laurent

karthikbg

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Jan 16, 2007, 9:22:03 AM1/16/07
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Hi,
Yes, the info provided above enables to conclude that 4K is efficient
that 1K pagesize. I was unable to use certain section of memory . I did
thought that assigning 4K size, did not allow me to use that memory
area extensively.
So, I was looking for some 1K page size configurations so that i could
use the memory efficiently. I think , here 1K is the better option .
What do you think ?

karthikbg

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Jan 16, 2007, 10:22:12 AM1/16/07
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Further, kindly share with me the different situations at which i need
to use Section Mapping / Coarse Table / Fine Table ? How are they
helpful & the respective mapping's disadvantages ?
I think, this will give me more clarifications.

karthikbg

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Jan 16, 2007, 11:25:05 PM1/16/07
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Fine, I find that these different schemes as below
1)Sections (1 MB blocks)
2)Tiny Pages (1 KB blocks)
3)Small Pages (4 KB blocks) and
4)Large Pages (64 KB blocks)
can be used based on our requirement of Mapping and similarly there are
4 routes by which the address translation takes place.

So, It depends on the Mapping requirements.

I think the uses can be as below :
1) Sections - For large size applications (They also need only one
TLB(First level
Translation ), So load on Processor will be less)
2) Tiny pages - For Interrupt Vector Tables. (Normally IVTs will be
small)
But this has been dropped in the future versions
of Arm. So maybe
the Small Pages should now be used for IVTs now.
3) Small Pages - ?
4) Large Pages - ?
Further , the Small pages can be used in the places to avoid
excess load on the processor (Switching). But, I wonder why there is
Large Page concept is present here . Where exactly can i use this
large page concept ??

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