Google Groups no longer supports new Usenet posts or subscriptions. Historical content remains viewable.
Dismiss

Phase 0 ghosting/jitter - is this really normal?

60 views
Skip to first unread message

Anthony Ortiz

unread,
Aug 30, 2022, 3:43:38 PM8/30/22
to
Hello world!

I'm seeing an occasional error when reading from my peripheral board circuit, about once every 50 million reads, and I'm trying to narrow down the issue. I decided to pull out my card (from a IIgs) and put a blank one in and attach probes to just the ground and phase 0 (pin 40) and see a lot of ghosting/jitter or whatever that is and I wanted to see if you guys think this is normal because it doesn't look kosher to me!

Probes at 1x: https://drive.google.com/file/d/1xaisSJ6kjPNAKoPKuPd1VkV0HrSmoYhj/view?usp=sharing

Probes at 10x: https://drive.google.com/file/d/1pO1FS7R1Fo8lGp97Dbfhuf4htH0n2f1-/view?usp=sharing

Anthony Ortiz

unread,
Aug 30, 2022, 3:50:10 PM8/30/22
to
Oh, FYI, I'm using the ReActiveMicro Universal PSU Kit UPGRADED IIgs Power Supply so it shouldn't be a PSU issue.

Anthony Ortiz

unread,
Aug 30, 2022, 4:49:50 PM8/30/22
to
I changed the mem depth from Auto to 24M @ 10x probe: https://drive.google.com/file/d/1jH3Sy9v4vxsuYMFACm742u1b5InfIEmJ/view?usp=sharing

Phase1 seems worse: 24M @ 10x probe: https://drive.google.com/file/d/1J_hEXfwo-LB6IAbNVQPDBX1B8Z5QOWn1/view?usp=sharing

I'm sure it's gotta be me, I'm no electronics expert, could definitely use some guidance. :)

Anthony

Anthony Ortiz

unread,
Aug 30, 2022, 5:21:52 PM8/30/22
to
Going through Sather's book again and I see I misunderstood the long cycle; I thought it applied to the 6502's internal phase 0/1 signals, but I was wrong, it applies to the external Phase 0 and Phase 1 signals (actually all 1mhz and 5mhz signals). So I'm guessing what I'm seeing is the result of this long cycle? I'm probably barking up the wrong tree here, lol

Kent Dickey

unread,
Aug 31, 2022, 12:39:54 AM8/31/22
to
In article <5534e386-af45-4612...@googlegroups.com>,
I looked briefly at the 1x. You have a lot of ringing. First, some ringing
is fine, if that's the way the circuit is designed. Old NMOS/CMOS stuff
is not trying to balance driver and receiver impedence, so I would expect
things to not look "perfect". If there is real ringing, it's only a problem
if the amplitude is so much that it causes the receiver to misread the
signal (so, a clock ringing so much that it could be intereted as a new
edge is a problem). As I explain to many people--some ringing is usually
fine, it needs to be severe to be a problem.

But: you showed the image of your probe--that's very useful. And you're
probing incorrectly. You need the tip of the probe to be within say 1cm
of the signal to be probed. You can not attach a long wire, and then
attach the probe to that wire. If you want to see a signal on the
motherboard, the probe tip must go right down there. You can solder on
a VERY SHORT stub of less than 1cm (I often solder on a resistor, and
then clip the lead down to <1cm since I can easily hold a resistor with
pliers, it's thinner than usual solid wire, and it makes the soldering
easy. You clip off the resistance blob itself). Then attach the probe
to that SMALL stub.

It looks like in slot 2 you have a prototyping card with a breakout
connector, and you've stuck some wires in the connector for the signal
and ground. These wires look to be about 6 inches long, and you've
attached the probe to these wires. If you put a resistor in that
connector instead, clip it to be short (and get rid of the resistance
part), and probe that. No soldering needed. Not as good, since you're
using an effective 3cm stub (the connector counts against you, sorry).

The best is to take a real card, like the card in slot 5, and find the
back side of a through hole chip with the signal you want. Solder on a
resistor lead, then snip it to be very short (5mm is very easy to do,
3mm is great). Note: I don't use new solder usually, just melt the
solder already there and it's enough to hold the stub. I find the probe
won't really clip on to the through-hole leads as they are since there's
not enough to grab onto beyond the solder ball. Then put the probe
directly on that stub, and it should grab on easily. This is about the
best I can do.

One trick is to test out ringing by manually holding the probe tip on the
signal as well, and see if the ringing gets better. If the 1cm stub shows
ringing, try manually holding the probe and see if it gets better. If it
still does, then there's just ringing on the signal. It happens.

It's ok to probe "badly" if it's easy, or that it's not worth the
trouble to probe properly. Try to look at the signals as "digital", and
ignore kinks, ringing, etc.

Kent

Anthony Ortiz

unread,
Aug 31, 2022, 3:54:08 AM8/31/22
to
Hi Kent! Thank you so much for responding, this is a great explanation of what I've been doing wrong. I'll do what you suggested and see what it looks like. I figured the problem was likely to be me, and thanks to you I'll be able to make a more informed test from now on.

Kent Dickey

unread,
Sep 1, 2022, 12:41:56 AM9/1/22
to
In article <25814600-6c5b-4bad...@googlegroups.com>,
Anthony Ortiz <anthon...@gmail.com> wrote:
>> I looked briefly at the 1x. You have a lot of ringing. First, some ringing
>> is fine, if that's the way the circuit is designed. Old NMOS/CMOS stuff
>> is not trying to balance driver and receiver impedence, so I would expect
>> things to not look "perfect". If there is real ringing, it's only a problem
>> if the amplitude is so much that it causes the receiver to misread the
>> signal (so, a clock ringing so much that it could be intereted as a new
>> edge is a problem). As I explain to many people--some ringing is usually
>> fine, it needs to be severe to be a problem.

[snip]

>> It's ok to probe "badly" if it's easy, or that it's not worth the
>> trouble to probe properly. Try to look at the signals as "digital", and
>> ignore kinks, ringing, etc.
>>
>> Kent
>
>Hi Kent! Thank you so much for responding, this is a great explanation
>of what I've been doing wrong. I'll do what you suggested and see what
>it looks like. I figured the problem was likely to be me, and thanks to
>you I'll be able to make a more informed test from now on.

I just wanted to reemphasize that the Apple II is very noisy, and I
would expect most signals to not look all that great. There's a reason
it's clocked at 1MHz. Ringing is generally not a problem at all on data
signals as long as it's not happening near clock edges. And the clock
will look bad since it's not really buffered and driven well--but it's
OK since all the timing requirements take into account that it doesn't
look good. The clock can ring, as long as the amplitude doesn't get
close to crossing Vih/Vil thresholds as it rings. It's kind of surprising
how bad signals can get before its a problem.

Some circuits are designed to have bad looking signal integrity--especially
if they are at relatively low speed. It's cheaper and works fine.
Signals ring when the driver is too strong for the capacitance load, and
TTL drives relatively strongly.

Kent
0 new messages