When to use a 74LS245 to buffer the data bus?
Glenn Jones
appropriate to use a 74LS245 to buffer the data bus? I see some designs that
use this chip and others that don't, so I am not sure if I need to use one?
Any input would be appreciated.
Thank You
Glenn
GSGeek
The 74LS245 is a bidirectionnal bus transceiver with 3-state output.
Depending on the signals present on G* and DIR pins, the chip can let data
bits flow trough its 8 bidirectionnal buffers (G* held high) or disconnect
from the Apple data bus (G* held low). The chip can 'disconnect' by putting
all its ouputs into high impedance. The transceiver is useful to interface
a device chip with bidirectionnal data bits which can't go into high
impendance.
The transceiver is also useful to increase the fanout of data input signals.
The Apple 2 bus' D0..D7 signals can only drive a few TTL inputs (less than
five I believe) per card.
In a nutshell, you won't need one if you have a few chips tied to the data
bus and if each one of them can have their data output signals go into high
impedance (disconnects from the bus).
Happy hardware hacking - it's fun!
Yves
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Glenn Jones
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Yves, I am interfacing an ethernet module to the Apple2 bus. The module has
two chips on it...one is a custom chip W3100A and the other is a RTL8201L
PHYceiver chip. I am not sure how many TTL inputs this would be equivilent
too.
The concept is the same as the TFE ethernet board that Adam Dunkels created
except that the Wiznet chip is amost 1/4 the price and has a TCP/IP stack
built into the 3100A.
I have a prototype wired up without the 74LS245 but IIgs hardware reference
pg 180 talks about loading and driving rules and this has got me thinking
htat maybe I should be using a 74LS245 for the data bus.
If you are interested, you can find out more information about my project at
http://members.rogers.com/rg.jones/AppleII_ethernet%20_project.htm
Thanks
Glenn
Peter Ibbotson
news:v_Eta.112009$kYH....@news01.bloor.is.net.cable.rogers.com...
> Yves, I am interfacing an ethernet module to the Apple2 bus. The module
has
> two chips on it...one is a custom chip W3100A and the other is a RTL8201L
> PHYceiver chip. I am not sure how many TTL inputs this would be equivilent
> too.
>
> The concept is the same as the TFE ethernet board that Adam Dunkels
created
> except that the Wiznet chip is amost 1/4 the price and has a TCP/IP stack
> built into the 3100A.
>
> I have a prototype wired up without the 74LS245 but IIgs hardware
reference
> pg 180 talks about loading and driving rules and this has got me thinking
> htat maybe I should be using a 74LS245 for the data bus.
>
> If you are interested, you can find out more information about my project
at
> http://members.rogers.com/rg.jones/AppleII_ethernet%20_project.htm
In practice you shouldn't need it, however it may well help you to work
"correctly" with respect to bus timing issues and overshoot/undershoot on
the bus.
You may well find the hold times on the outputs of your ethernet chip are
too short for the technology used on a GS, sticking a buffer in the way will
extend the hold time.
Personally I'd be tempted if you're doing a PCB to put the 245 on the board
and then put jumpers across the buffers if the chips not present.
--
Work pet...@lakeview.co.uk.plugh.org | remove magic word .org to reply
Home pe...@ibbotson.co.uk.plugh.org | I own the domain but theres no MX
Rubywand
>
....
>
> Yves, I am interfacing an ethernet module to the Apple2 bus. The module has
> two chips on it...one is a custom chip W3100A and the other is a RTL8201L
> PHYceiver chip. I am not sure how many TTL inputs this would be equivilent
> too.
>
> The concept is the same as the TFE ethernet board that Adam Dunkels created
> except that the Wiznet chip is amost 1/4 the price and has a TCP/IP stack
> built into the 3100A.
>
> I have a prototype wired up without the 74LS245 but IIgs hardware reference
> pg 180 talks about loading and driving rules and this has got me thinking
> htat maybe I should be using a 74LS245 for the data bus.
>
> If you are interested, you can find out more information about my project at
> http://members.rogers.com/rg.jones/AppleII_ethernet%20_project.htm
>
Usually, you would not use a bus transceiver unless there were some reason
to isolate the peripheral bus-- like the peripheral (local) data bus is used by
a controller on the board to talk with other chips on the board.
If you have peripheral board outputs which are seperate from inputs,
having an 'LS244 octal tri-state buffer (or a couple of LS365's or LS125's) on
the peripheral data outputs is pretty standard practice. It guarantees the
peripheral can drive the system bus and can improve peripheral response (when
peripheral chip outputs can be tied to 'enabled').
If your peripheral IC's handle data only through a bidirectional bus, you
can check IC documentation to see if adding a transceiver or pairs of buffers
is a typical option supported by the chip(s) and when adding buffers is
recommended.
Otherwise, it may be best to leave space for a few extra chips on the
prototype and try out the board with no special buffering.
Rubywand
Eric Smith
> Usually, you would not use a bus transceiver unless there were some
> reason to isolate the peripheral bus-- like the peripheral (local)
> data bus is used by a controller on the board to talk with other chips
> on the board.
I disagree. The Apple bus only supports two LSTTL loads per card on
most signals, and only one on some. If your card needs to tie the
data bus or address bus to more than two chips, you should have bus
buffers, regardless of whether there's any other activity on the local
side.
Given that suitable data bus buffers (e.g., 74HCT245) are quite inexpensive,
there's very little reason NOT to use them. If your address bus lines
go to more than one part, I'd recommend buffering them as well.