cb meeks wrote:
> That was very helpful! I don't speak (or read) German but good thing
>schematics are universal. :-)
Doesn't matter. The schematics and figures are important.
> It seems the answer is altering the clock somehow (through delays).
Just delay PHI0. At the
6502.org thread somebody mentioned the Apple
"Tech Info Library Article 494" from 1984 (last changed 1997). This
solution is a bit different but the result is similiar.
> I also noticed they didn't use any buffers on the databus.
That's not necessary if you add just one or two 6522. Adding some more
peripheral chips I would add a buffer too.
> What are your thoughts on that?
This 65(C)22 card works :-) I added one to my IIe Rev.A and the other
into a Taiwan clone IIeuroplus without any problem.
> That sounds interesting! Would love to know more about that setup. Did
> you write some custom software to transfer data?
The IIe was my master p-System machine. The other was the slave. The
BIOS gave some jobs to the slave because lack of slots, lack of CPU
power, ... The communication was like the Centronics protocoll because
the 6522 can do this well. I used both parallel channels for each
direction.
The slave was populated by a clock card, 512kB RAM card, PAL card. And
there were plans to do more.
Regards
Ralf