I have read that we can put different PN-sequence in a DSSS system on
the signal I and Q....
What is the advantage to do this ?
I had already implemented a complete DSSS system in a Altera FPGA and
that works fine but we have poor performance with the DQPSK modulation
(-88 dBm) and good performance with DBPSK (-93 dBm)
And when we pass from a 11 chip PN (-93 dBm) sequence to a 63 chip
(-97 dBm) sequence we don't find the process gain desired only 4 dB of
gain and it's theoritically 8 dB from Gp = 10 dB t(N=11) to Gp = 18 dB
(N=63)
Do you have some suggestions, perhaps put differents PN onto the
branchs I and Q with the DQPSK modulation...
Best regards...