JOB ANNOUNCEMENT - OFFRE D'EMPLOIS
Sergio Yovine
VERIMAG is a research laboratory having strong links with
industry. The main research stream at VERIMAG is the design and
validation of real-time, reactive systems.
VERIMAG is looking for a POSTDOCTORAL RESEARCH ENGINEER to work on the
development of a computer environment for the automatic verification
of embedded real-time applications in telecommunications industry.
The purpose of the projet is to integrate the real-time systems'
verification tool KRONOS developed by VERIMAG, with an embedded
systems' programming environment developed by France Telecom.
The work will be carried out within the context of a challenging R&D
project involving an industrial partner, VERIMAG and France
Telecom. It will take place in an academic/industrial environment
motivating the cooperation between researchers and telecom engineers,
and favoring the transfer of fundamental research to industry and the
confrontation of academic tools with real-world applications. The
resulting product will be used by the industrial partner for the
development of mobile phone code.
The position is open for non-french citizens.
Candidates having a Ph.D. degree in areas related to embedded systems,
software engineering, telecommunications and validation of reactive
real-time systems, with proven experience in programming, are
encouraged to send a complete CV by e-mail to:
More information about Verimag is available at:
http://www-verimag.imag.fr