HDL code generation
khan Sim
i have used an embedded matlab block named as Embedded MATLAB Function3
when i run the compatibilty checker i get no errors but when i run the generate code, i get the following errors
.
Code generation failed Call to unsupported function (cos) detected.
Function 'eml_scalar_cos' (#43.138.148), line 8, column 9
Function 'cos' (#42.298.318), line 10, column 12
Function 'eml_fft' (#39.4114.4124), line 122, column 28
Function 'eml_fft' (#39.1969.2000), line 52, column 5
Function 'eml_fft' (#39.1840.1869), line 47, column 10
Function 'fft' (#49.278.306), line 9, column 5
Function 'Embedded MATLAB Function3' (#19.46.65), line 3, column 14
i hope there is no imbiguity in code understanding ,
kindly help me out , how can i remove these errors???
and generate HDL succesfully???
urgent help required,
kind regards
Sean Little
The problem you are experiencing happens because you are using functions in EML that are not supported for HDL code generation. Neither the COS or FFT functions can be converted directly to Verilog in the HDL Coder.
Instead, you will need to break up your EML design and use the HDL FFT block from the HDLDEMOLIB library. You will also need to use an approximation for the COS function. The cordic algorithm might work for you. See the following doc link:
http://www.mathworks.com/access/helpdesk/help/toolbox/simulink/slref/trigonometricfunction.html
I do hope you are using fixed point, right?
Sean Little
khan Sim
well i am not using fixed point tool box, i have made a simulink model and used the embedded function block.
Kindly guide me what is the role of fixed point tool box in the HDL code generation process???
and i can send you the code via your email, for your future guidance. cuz i see very little people having expertise in HDL and simulink.
waiting for your reply
thanx.
khan Sim
i hope you may guide me after looking at this code
function smb = fcn(sb,sb0)
%#eml
fsb=fft(sb);
fsb0=fft(sb0);
% Power equalization%
amp_max=1/sqrt(2); % Maximum amplitude for equalization
afsb0=abs(fsb0);
P_max=max(afsb0);
for k = 1:length(fsb0)
if afsb0(k) > amp_max*P_max
fsb0(k) = (amp_max*(P_max^2)./afsb0(k)).*exp(1j*angle(fsb0(k)));
end
end
fsmb=fsb.*conj(fsb0);%
% Inverse Fourier Transform%
smb=fftshift(ifft(fftshift(fsmb.'))).';
i am not using cos function anywhere in the code.
waiting for reply
regards
khan
Sean Little
posted is using double precision data. The HDL Coder *might* produce Verilog
from this EML (assuming you either write your own FFT, EXP, SQRT, IFFT,
FFTSHIFT functions or find compatible implementations), but the result would
not be useful in ANY practical sense. The reason is that you are developing
hardware here, not software. An FPGA has no way to handle floating point
data like a normal software program would. You must therefore use fixed
point if you intend to synthesize this design.
You must do the following:
1) Find/write an HDL compatible implementation for FFT, EXP, 1/SQRT, IFFT,
FFTSHIFT. I have some approximation utilities that might be useful. I have
been planning on posting those to the file exchange for a while, and I will
try to do that this week. That would help with EXP and 1/SQRT. For your FFT
implementation, I would point you to the "eml_hdl_design_patterns.mdl" demo
that ships with the HDL Coder. Note that once you have an FFT, the IFFT is
just an FFT with a conjugate scale factor.
2) Convert your code to use fixed point.
This is a very interesting project, but both those steps will require
significant time and effort. I recommend lots of careful unit testing. If
you have access to the EDA simulator link, your task will be easier.
If you have specific questions, please post here.
Sean Little
khan Sim
i have started working on fixed point tool box, worked on the HDL demos. those were really eye openers to me.
well i have further divided the embedded matlab function code into simulink blocks.
now the only code left is
function smb = fcn(fsb,fsb0,amp_max,afsb0,P_max)
%#eml
for k = 1:length(fsb0)
if afsb0(k) > amp_max*P_max
fsb0(k) = (amp_max*(P_max^2)./afsb0(k)).*exp(1j*angle(fsb0(k)));
end
end
% Apply a window (e.g., power window) on fsb0 here%
% Matched Filtering%
fsmb=fsb.*conj(fsb0);%
% Inverse Fourier Transform%
smb=fftshift(ifft(fftshift(fsmb.'))).';
i think the difference between the early code and this code is visible.
can you guide me how can i implement the following code in term of simulink blocks so that i can synthesize them. any hint.. ?
fs
for k = 1:512
if afsb0(k) > amp_max*P_max
fsb0(k) = (amp_max*(P_max^2)./afsb0(k)).*exp(1j*angle(fsb0(k)));
end
thank you very much, after working on your previous post, i ve been able to go ahead.
waiting for your reply
regards
khan
khan Sim
i ve some queries,
do we define a clock source in simulink model like we define in verilog?
what is the difference between sample based, time based and frame based???
Walter Roberson
> do we define a clock source in simulink model like we define in verilog?
> what is the difference between sample based, time based and frame based???
http://www.mathworks.com/access/helpdesk/help/toolbox/dspblks/ug/f13-62668.html
Walter Roberson
> do we define a clock source in simulink model like we define in verilog?
> what is the difference between sample based, time based and frame based???
http://www.mathworks.com/access/helpdesk/help/toolbox/dspblks/ug/f13-62668.html
Walter Roberson
> do we define a clock source in simulink model like we define in verilog?
> what is the difference between sample based, time based and frame based???
http://www.mathworks.com/access/helpdesk/help/toolbox/dspblks/ug/f13-62668.html
Walter Roberson
Sorry for the duplicates; my news server lied to my posting software
again and said the message was _not_ posted.
khan Sim
i have a confusion, i am getting an input x=[1,512], means number of rows=1 and number of collumns =512 at time 0. t=[0].
the input in data inport would be [t],[x] . now i am getting this data at time 0. it means i am getting data in parallel form. Am i right here???
Is sample based and frame based data acquisition some thing to do with serial or parallel input????
waiting for reply
kind regards
Khan
Sean Little
> for k = 1:512
> if afsb0(k) > amp_max*P_max
> fsb0(k) = (amp_max*(P_max^2)./afsb0(k)).*exp(1j*angle(fsb0(k)));
> end
You are still thinking about this problem in terms of software development. What does a FOR loop mean in terms of hardware?
You can solve problems like this using techniques such as "loop unrolling". In other words, you could write a statement for each iteration of the FOR loop, essentially creating 512 parallel copies of the hardware you want. But this can be wasteful of hardware resources on the FPGA, especially since the ANGLE and EXP functions will not be simple to implement.
Alternatively, you could increase the clock frequency by a factor of 512 and use a single instance of the hardware. That is the option I would recommend, but this option is more complex, as you will need to design control logic. A simple counter should suffice, but you will need to manually create the upsampling and downsampling logic. I would recommend that you create a simple model that will allow you to debug this process.
I have some spline based approximation utilities that I developed for implementing complex functions over known intervals in HDL. I have used this to build an approximation for EXP, and I know this works for other functions also. I will post that material to the file exchange this week. This *might* help you, but if not, you will need to find a way to do the necessary approximations using only HDL supported Simulink blocks or supported EML constructs. I can only advise you in that effort.
Sean Little
khan Sim
well
i ve seen some demos of hdl , doing fft and stuff. actually they are getting data from signal source with in the model. i want to get the signal from the works space.
the signal in workspace is in the form of [1x4] complex data. i ve a confusion, hopefully i think you will remove that.
sb is a matrix of [1x4], ie number of rows =1 and number of columns=512
sb is a complex double data,
t=[0,1,2,3]
i want to input this data to a simulink model. i am using the inport block to input data.
i am using the following expression in the data inport in the configuration of simulink model
[t;sb]'
i wan to store this data in a buffer, and retrieve it later for fft.
i am try but not getting any success.
thanx
khan Sim
Acting upon your tips, i am starting with a simple model which can do fft for N=8. i getting sample based data from workspace. i want to convert this data from Serial to Parallel. i have used buffer for that with a frame size of 8, but when i run the simulation i get the following error.
Error reported by S-function 'sdsprebuff2' in 'basic/Buffer':
All sample times for this block must be discrete.
No continuous or constant sample times are allowed.
Kindly have a look into it
anxiously waiting for your reply :)
thanx
khan Sim
i ve been able to use hdl coder for fft of input signal from workspace, first it was not working, cuz i was using inport block , when i used the signal from workspace block, the problem was solved.
thank you very much,
as i go ahead and i will face any problem, i will surely bother u. :)
thanx
Kind regards
Khan
Sean Little
As promised, I have started the process of posting some materials to the File Exchange. It will take a couple of days for my submission to be approved.
Note that you can also use a constant block with the constant field that references a variable defined in the MATLAB workspace.
Sean Little
khan Sim
FFT has been successful as i found hdl coder block, but how about IFFT(Inverse fourier transform). as far as i have searched, i dont find any HDL compatible block in simulink.
How can i perform ifft compatible with hdl???
thanx
regards
khan
Sean Little
There is no IFFT block in the HDL coder.
You can compute the IFFT using the FFT block. To compute the IFFT, simply take the conjugate of the complex values before you pass them to the FFT block. Then take the conjugate of the outputs again, followed by a gain block with the value 1/N where N is the size of the FFT.
khan Sim
HDL coder (used for fft) =HDLFFT
and
HDL coder (used for Ifft)=HDLIFFT
I am using the same HDL coder for IFFT aswell. The "dout" of HDLFFT is connected to the "din"of HDLIFFT via "complex conjugate" block. The "dvalid" of HDLFFT is connected to the "start" of HDLIFFT. Now i think the output "dout" of HDLIFFT should be equal to "din" of HDLFFT. but when i see the result on scope, the real part of both the signals that is (the "din" of HDLFFT and the "dout" of HDLIFFT are not the same).
has it something to do with the timing of signals? "dvalid" of HDLFFT and "start" of HDLIFFT?
Thanx
regards
khan
khan Sim
i have posted the problem i am facing, i think it will be easy for you to understand the problem, if you look at the actual model, so i have sent the model to you to your email address sanb...@fastmail.fm, i hope you will check it and advise me accordingly.
thanx
Sean Little
It seems that you are having problems with the timing modes for the HDL Streaming FFT blocks. I do not have time to debug this for you. I would suggest that you start with a much simpler model and gradually add complexity as you get small things working.
I did notice that you are using a MATLAB function block to perform the conjugate operation. This is not compatible with the HDL Coder. It would be better if you used the "Math Function" block, and selected the conjugate operation.
I am still waiting to get my suite of approximation tools approved for publication. Because I work for the MathWorks, there are some steps that must be taken before any submission can find its way to the File Exchange.
Sean
Sean Little
I was finally able to get the promised approximation utilities published on the File Exchange. It is pretty rough, and still a work in progress. But I have found it useful. Take it for what it is worth.
khan Sim
more over your files in the files exchange are really helpful to me, i hope to use them in the future as i go on.
i have a question,
after the input signal is passed through HDL Minimum resource FFT block, the output data is again in serial form, that is the data is coming out of fft block sample by sample.
the sample time is 1/N where N is the FFT length.
Now i want to apply the following function on the sampled output.
1. taking absolute of the fftout from hdl coder
2. find maximum value of the output samples after taking absolute, for a sample time of 1.
i have the following querries.
1. the "abs" function block requires the input to be of type "double" if the input is complex. Now i am working with fixed point numbers for HDL code generation, what should i do to take absolute of the fixed point value which is a complex fixed point number.???
2. how can i take the maximum of the input values of length N???. i am getting each value at a sample time of 1/N. should i use a counter, ? or convert the data from serial to parallel? how can i convert data from serial to parallel?? if i use "buffer", it is not synthesized by the HDL coder and error is given. what should be my approach to execute the max of input samples for time interval of 1. that is from the start of one sample to the end of last sample of the fft.
waiting for your reply
thank you very much.
khan Sim
Kindly try to read the whole problem, i apologize for typing much. :)
i am facing a problem , i am trying for the last 2 weeks but the problem is still there. urgent help is required.Kindly understand the problem and reply . the problem is given below.
Input 'A' can have any value. For simplicity i have given signal as A=[1,2,3,4].
1. A signal 'A=[1,2,3,4]' is coming into a simulink model . The signal is sample based with sample time of 1/4. it means the 4 samples of 'A' comes in 1 second. i have made an HDL compatible simulink block which finds the max of signal 'A' i.e Amax =max(A). The max is calculated as the last input of signal 'A' enters into the block (here the last input is '4') .
2. it means the first max is caculated and given as output at time t= 3*1/4 the second max is caluclated at time t=1+(3*1/4 ) The third max is calculated at t=2+(3*1/4) and so on.
3. In the next step the max is divided by 2, that is Amax2= Amax/2. Amax2 is a scalar number.
4. Now Amax2 is compared with EACH sample of 'A'.
if Amax2>A
ouput=Amax2
else
output=A
5. It may be noted that Amax2 is generated at t=n+(3*1/4) where n=0,1,2,3,4.....
(AFTER THIS YOUR GUIDANCE IS REQUIRED, KINDLY RECTIFY ME IF I AM WRONG )
6. i have used Delays to shift the signal 'A' with delays 0,1,2,3 in parallel, that is 4 wires are connected to A and wire0 is delayed with 0, wire1 with 1, wire2 with 2 and wire3 with delay of 3.
now the signals of wire0,wire1,wire2,wire3 are compared separately with 'Amax2' and the output is given. in this way i have compared every sample of A with 'Amax2'.
7. Now i have four outputs as a result of wire0, wire1, wire2, wire3. the outputs are output0, output1, output2, output3. EXCEPT THE the sample at t=n+(3*1/4), rest every sample is equal to the corresponding original samples of 'A'.
The problem is
8. How can i extract the samples at t=n+(3*1/4) from the output1, output2, output3 and output4???
"it may be noted that i am making this model for HDL code genration."
kind regards
Khan
khan Sim
thanx