Hardware Flow Control for Serial Ports

[Dan Pinson]

I'm receiving raw data on a serial port using VxWorks standard driver. I
suspect that the receive FIFO is being overrun. Here is the situation:

PentiumPC BSP
16550 UART

After opening the port, I enable hardware flow control via ioctl. After
receiving at 115K for awhile, I get unexpected data. The same device works
OK on another system under a different OS. This is just an indicator; not
proof.

I checked the highwater mark in my RX ring buffer. It was well below the
free space.

In looking at the 16550 serial drivers target/src/drv/sio/ns16550Serial.c
and ns16550Sio.c, I see how transmitting is throttled by CTS but not how RTS
is manipulated. I notice that the UART driver does nothing with an rx
overrun interrupt. I thought tyLib might clear RTS when the buffer gets
full, but I don't see an API in the UART driver that could be used.

Bottom-line is that I wonder if RTS/CTS flow control works on the x86 BSP
and/or with the 16550 drivers.

Thanks in advance,
Dan

[Michael Lawnick]

Hi Dan,

didn't really get through your post, just the standard injection when UART
is concerned:
Did you enable its FIFO? Remember that the standard vxWorks driver doesn't
do that. You'll have to patch the code in src/drv/sio along your needs.

HTH
Michael

"Dan Pinson" <da...@extendsys.com> schrieb im Newsbeitrag
news:ao2fpu$ijho7$1...@ID-48686.news.dfncis.de...

[Dan Pinson]

Michael,

Thanks for the warning but it looks to me as if the FIFOs are enabled in the
ns16550 driver. From ns16550Open():

REG(FCR, pChan) = (RxCLEAR | TxCLEAR | FIFO_ENABLE);

Regards,
Dan

"Michael Lawnick" <lawnick@no_spam.softec.de> wrote in message
news:ao34ct$fdr$1...@snoopy.bndlg.de...

[Dan Pinson]

Woops! The x86 BSPs are using the 8250 drivers. Criminy, when are they going
to move up to the modern world? Anyway, thanks. I'm probably being overrun
because the FIFO is not being used.

..Dan

"Dan Pinson" <da...@extendsys.com> wrote in message
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