I have now spent 4 hrs trying to do this... I even broke down and
tried to find it int the doc and faq...
What is the proper way of doing this? using AND has sideffects
on the CR. Using addi seemed promising, and was suggested by
someone, so I tried
lis r0,HI(value)
li r0,LO(value)
which didn't work because the add's ignore r0 as a "S" fields
(use 0 rather than [rS]); so I tried
lis r11,HI(value)
li r11,LO(value)
and that screws up if the hi bit of LO(value) is set (it
sign extends the sign bit trashing the value set in the
previous lis operation!
I thought about swapping the order, but that wont work
either because the "addi" would treat the LO(value) loaded
into the low 16 bits of CTR as a negative number...
This should not be this hard... what's the magic answer guys?
thanks.
Al Johnston wrote:
> I am trying to do something very simple. Loading a 32bit unsigned
> number into the CTR (SPR 9) register with minimal side effect.
>
You can use the instructions
mtctr rS (move to control register)
mfctr rD (move from control register)
or use
mtspr 9,rS (move to special purpose register)
mfspr rD,9 (move from special purpose register)
Some thing like this should do the trick:
asm( "mtctr %0" : : "m" (value) );
mtctr rS means: move to count register, not control register
mfctr rD means: move from count register, not control register
addis 0,0,HI(value)
ori 0,0,LO(value)
mtctr 0
> using AND has sideffects on the CR.
AND has no such side effect, but AND. (opcode ends in a period) will
change the CR.
-=- Andrew Klossner (and...@teleport.com)
> addis 0,0,HI(value)
> ori 0,0,LO(value)
> mtctr 0
sigh... and thanks, will try this tomorrow.
> AND has no such side effect, but AND. (opcode ends in a period) will
I know I checked this; Ah, there is a "if ." on the side effects...
thanks for straightening me out.ch...
-al
The problem isn't the mtspr order, its getting that number into the
register.....
> This should not be this hard... what's the magic answer guys?
>
The answer is to use ori as the second order......
addis reg,0,HI(value) (lis is a simplified mneomic version of addis)
ori reg,reg,LO(value)
That's the good news.
The bad news is that the versions of gcc that I have use the construct
addis/add (lis/ls in simplified format) so get the constant wrong half the
time. Getting a CTR value wrong is one thing, sending the processor to
completely the wrong address is really bad news!
The sequence
addis r9, 0,value@ha
addi r9,r9,value@l
will do the right thing for any value because it uses "@ha" (highword
adjusted) instead of "@h". Perhaps that's what your compiler is
doing?
"ls" is not a standard simplified mnemonic (per appendix F of the
green book.) Where do you find it?
-=- Andrew Klossner (and...@teleport.com)
You didn't answer his question.
Since the original poster is a PowerPC neophyte, I expect they meant
to type "addis/addi (lis/li ...".
--
Christopher S. Kush
(303) 661 7509
kus...@ib.stortek.com
On second thought, probably "addis/add (lis/add..."
To the original poster:
You realize that there is no way to load an arbitrary 32 bit value into a
register with one instruction. You have to load the lower sixteen and
then add in (or in, whichever) the upper sixteen.
The PowerPC Compiler Writer's Guide (get yourself a copy from IBM's
web site) recommends using adds instead of ors, because future PowerPC
implementations may have three-input adders.
Yes, I am a ppc neophyte (g), but not quite that bad...
re Compiler Writers Guide... yet another book!!! You think there
would be an end to the list of books... but then again, its
probably not a good idea to gripe about having TOO much doc...
Thanks to all for the "help the dumb newbie" responses.
I think this comes under the category 'typo'. I know what the original
poster meant, Green Book or no Green Book.
I don't bother with the simplified codes. Its not only more things to learn
(and get wrong) but also the debuggers I have only show the standard forms
when disassembling.
>
> You realize that there is no way to load an arbitrary 32 bit value into a
> register with one instruction. You have to load the lower sixteen and
> then add in (or in, whichever) the upper sixteen.
>
This goes for all RISCs that I know of except for one. Its just that
commonsense would dictate that you have some simple and reliable mechanism
to load constants to a register - maybe a load/loadhigh instruction pair?
(Like the 29K) (The exception is the Hitachi processors. They're 32/64 bit
units that are not dissimilar to the PowerPC, they've got 16 bit
instructions and no load literal instructions at all.)
> The PowerPC Compiler Writer's Guide (get yourself a copy from IBM's
> web site) recommends using adds instead of ors, because future PowerPC
> implementations may have three-input adders.
>
That's very nice of them but to mention this but I don't see the relevance
at all to loading a literal. I suspect what's happening here is a bit of
"old company obsurfurcation" (if you've ever had any significant experience
of Token Ring networking (but not just TR networks) then you will know what
I mean....).
Speaking personally - and this is definitely "IHMO", no flames please -
there's not going to be any future for the PowerPC processor in my world. I
build embedded systems and I can't wait to put as much distance between this
architecture and my products as possible. There are far, far, easier ways to
achieve product. (I will grant everyone that once the thing is working it
does go very fast for its clock speed, but in my world performance is not
just a matter of how fast a processor executes numeric algorithms.)
[someone else wrote:]
> > The PowerPC Compiler Writer's Guide (get yourself a copy from IBM's
> > web site) recommends using adds instead of ors, because future PowerPC
> > implementations may have three-input adders.
> >
>
> That's very nice of them but to mention this but I don't see the relevance
> at all to loading a literal. I suspect what's happening here is a bit of
> "old company obsurfurcation" (if you've ever had any significant experience
> of Token Ring networking (but not just TR networks) then you will know what
> I mean....).
>
Using adds can also be beneficial on the 603e and related cores, because
some types of integer addition can be executed in the "system unit" in
parallel with some other integer instruction in the integer unit. The newer
PPC cores (and the good old 604 line) have two full-featured integer units,
so it makes no difference there.
Holger
I have had no luck finding this... can you give me a site?
thanks,
-al
> I have had no luck finding this... can you give me a site?
deja.com, where you can search prior postings to comp.sys.powerpc.tech
for information such as this.
The Guide itself is at
http://www.chips.ibm.com/techlib/products/powerpc/manuals/compiler/cwg.pdf
... at least it was three weeks ago, the last time this question was asked.
-=- Andrew Klossner (and...@teleport.com)