eieio;sync ?
Arun Prasad
I'd like to know what this particular instruction (eieio;sync) does
and
when and how we have to use this?
Mean while,
This is what I got from gcc manual...
=============
For example:
*(volatile int *) addr = foo;
asm volatile ("eieio" : : );
Assume addr contains the address of a memory mapped device register.
The PowerPC eieio instruction (Enforce In-order Execution of I/O)
tells the CPU to make sure that the store to that device register
happens before it isssues any other I/O.
=============
But nothing mentioned (or I might have missed) about "sync".
Thanks in advance.
Regards
Arun
----
Arun Prasad
Software Engineer
Adaptec India Pvt. Limited
(A wholly owned subsidiary of Adaptec Inc., USA)
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David Laight
>
> *(volatile int *) addr = foo;
> asm volatile ("eieio" : : );
>
> Assume addr contains the address of a memory mapped device register.
> The PowerPC eieio instruction (Enforce In-order Execution of I/O)
> tells the CPU to make sure that the store to that device register
> happens before it isssues any other I/O.
I suspect that what you are more likely to need is:
*(volatile int *)a1 = foo;
*(volatile int *)a2 = bar;
asm volatile ("eieio" : : );
*(volatile int *)cmd_reg = cmd;
In order to ensure that the device sees everything seteup
before it is given the command!
OTOH I'm sure that the C standard says that volatile accesses
will occur in the order they are coded!
(K&R2 says nothing...)
David
Arun Prasad
Thanks for your reply. But I think I've misleaded you by giving that
example from gcc manual.
My questions are,
*what this particular instruction (eieio;sync) does?
and
*when and how we have to use this?
*Especialy, what's the meaning and significance of the word "sync" in
that statement?
I am having an assumption like, the word "sync" is used to maintain
cache coherency.
*Am I right in this regard?
Your Answers/comments are welcome.
Regards
Arun
David Laight <da...@spamm.me.l8s.co.uk> wrote in message news:<3C77F963...@spamm.me.l8s.co.uk>...
kannan
> My questions are,
>
> *what this particular instruction (eieio;sync) does?
> and
> *when and how we have to use this?
Stores followed by loads can be executed out-of-order by PPC
to allow optimum use of resources.
consider the case:
void test(void)
{
//line 1:some Store instruction that access I/O devices
//line 2:eieio
//line 3:some Load instruction that access I/O devices
}
The line 2 insures that line 1 will be completed before
line 3.
Without this "eieio" instruction PPC
will execute out-of order.May the line load finishes
before store(In this example).
You have to use this instruction between a store
followed by a load instruction.
> *Especialy, what's the meaning and significance of the word "sync" in
> that statement?
This "sync" instruction is used for execution synchronizing.
This instruction will wait for all preceding operations to complete.
This instruction u have to use whenever a change of state
occurs in the system parameters(say some mode settings in PPC)
Thanks and Regards,
Kannan
David Laight
>
> void test(void)
> {
>
> //line 1:some Store instruction that access I/O devices
> //line 2:eieio
> //line 3:some Load instruction that access I/O devices
>
> }
>
> The line 2 insures that line 1 will be completed before
> line 3.
>
> Without this "eieio" instruction PPC
> will execute out-of order.May the line load finishes
> before store(In this example).
I had a feeling that the ppc was up to worse tricks that this!
(but have never read the ppc manual).
Most SPARC cpus can do the 'load' before the 'store' in the
above example (provided the addresses are different).
I'm not even absolutely sure that the x86 can't as well
- especially if the load is memory and the store IO (or vv).
David
Vinh
PPC architecture uses the following instruction for synchronization
in it's pipes:
eieio -- for ordering of I/O accesses
isync -- for ordering instruction execution.
sync -- for both, this is consider as the most expensive inst.
However, different flavor of PPC have minor differences for these
instructions. Therefore, check your manual for a particular flavor...
Vinh Lam
David Laight <da...@spamm.me.l8s.co.uk> wrote in message news:<3C7A0C40...@spamm.me.l8s.co.uk>...
Arun Prasad
Thank you for all of your answers.
They made me to understand eieio and sync in a better way and in a faster way.
Regards
Arun
vlos...@yahoo.com (Vinh) wrote in message news:<c129947c.02022...@posting.google.com>...