VxWorks - Minimum Initializations for PCI

Ganesan, M

unread,

Feb 14, 2001, 9:25:17 PM2/14/01

to

This message is in MIME format. Since your mail reader does not understand
this format, some or all of this message may not be legible.

------_=_NextPart_001_01C096F6.8909DCA0
Content-Type: text/plain;
charset="iso-8859-1"

Hi,

I am using MPC 8240 Kahlua based evaluation board. When I am trying to plug
PM/PPC (artesyn board) into the unused PCI slot of MPC 8240 board, I am not
able to boot MPC 8240 board. I have added code in syslib.c to issue
PCI_CMD_MASTER_ENABLE to PM/PPC who waits for that. Other than this, I have
not included any code for memory space mapping as I am not going to access
any memory from MPC 8240 as of now.

My questions are

1. What are all the minimum initialization which are mandatory to be done
for plugging an PCI device in the bus from bus arbiter point of view.

2. If I need to access memory from both end (from MPC 8240 to PM/PPC and
vice-versa), with MPC8240 as bus arbiter, what are all the steps I need to
follow. What init codes I need to add in both bsp?

Please help me in this regard

bye

ram

------_=_NextPart_001_01C096F6.8909DCA0
Content-Type: text/html;
charset="iso-8859-1"

<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">

<META content="MSHTML 5.00.3207.2500" name=GENERATOR></HEAD>
<BODY bgColor=#ffffff>
<DIV>
Hi,
I am using MPC 8240 Kahlua based evaluation board. When I am trying to plug
PM/PPC (artesyn board) into the unused PCI slot of MPC 8240 board, I am not able
to boot MPC 8240 board. I have added code in syslib.c to issue
PCI_CMD_MASTER_ENABLE to PM/PPC who waits for that. Other than this, I have not
included any code for memory space mapping as I am not going to access any
memory from MPC 8240 as of now. 
My questions are
1. What are all the minimum initialization which are mandatory to be done for
plugging an PCI device in the bus from bus arbiter point of view.
2. If I need to access memory from both end (from MPC 8240 to PM/PPC and
vice-versa), with MPC8240 as bus arbiter, what are all the steps I need to
follow. What init codes I need to add in both bsp?
Please help me in this regard
bye
ram</DIV></BODY></HTML>

------_=_NextPart_001_01C096F6.8909DCA0--

Girish V. Gulawani

unread,

Feb 15, 2001, 12:35:46 AM2/15/01

to

Hi, Ram.

> 1. What are all the minimum initialization which are mandatory to be done
> for plugging an PCI device in the bus from bus arbiter point of view.

The WindRiver provides the PCI AutoConfiguration driver w/ source.
During bootup the PCI devices should come up initialized - semi plug and
play.

Anyway, typically to configure the PCI device the Configuration header
is filled which is nothing but the PCI initialization. The steps other
than device specific init are to fill up following headers -
Command Register : Enable IO/Memory, Parity Error. Also see if your
device wants to be bus master.
Cache Line : Typically 32.
Latency : Full, 0xFF.
Interrupts : Almost devices use INTA. Again the PCI library mentioned
above, provides routines to allocate and manage interrupts.
BARs : Remember the PCI BAR values are physical addresses as seen
by PCI device and not virtual addresses seen from CPU. So for example IO
add offset 0x80000000 and to access memory you add offset of 0xC0000000
to the physical address to get virtual address. To get physcial from
virtual, I bet you know what to do! The actual memory map depends on
your board configuration. Refer your config.h it should be somewhere
there.

> 2. If I need to access memory from both end (from MPC 8240 to PM/PPC and
> vice-versa), with MPC8240 as bus arbiter, what are all the steps I need to
> follow. What init codes I need to add in both bsp?

Once you configure the PCI header with appropriate BAR and other values.
The IO and/or Memory access is performed as given in BAR explanation
above.

Also a mundane note but very important, PCI is a Little Endian bus.

HTH.
Girish.

jagan

unread,

Feb 16, 2001, 8:39:01 AM2/16/01

to

You might be running into the problem where
both boards assume they are master and try to
enumerate the PCI bus.
What you may have to do is to turn off the pci
enumeration code in the Artesyn.

S Johnson

unread,

Feb 17, 2001, 7:02:13 AM2/17/01

to

The Artesyn PM/PPC will only attempt to enumerate the PCI bus if the
MONARCH# signal is asserted. The PM/PPC will be requesting that the PCI
host map out it's entire SDRAM (32/64/128/256MB) into PCI Space, so ensure
the PCI driver on the PCI host can deal with this. I've seen instances on
other products where someone made an assumption and defined PCI_MEM_SIZE
very small (0x200000). So when the PCI enumeration software gets to any PCI
device that requests more than the defined size all of PCI Space allotted
for that particular kernel is used...hence it's probably the last thing
you'll see happen.

Keep in mind that there is a distinct difference between a PCI Master and a
PCI Monarch. A non-Monarch PCI device can be a PCI bus Master. A PCI bus
Master can REQ the PCI bus, but will not enumerate the PCI bus (unless a PCI
Monarch). A PCI Monarch (should have PCI Master capabilities) and will
enumerate the PCI bus & handle PCI interrupts.

"jagan" <ja...@mediaone.net> wrote in message
news:3A8D575B...@mediaone.net...