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mmap memory - mem= option passed during boot

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Jothy

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Jun 24, 2009, 6:06:48 AM6/24/09
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Hi,
I have a driver in which I mmap a portion of RAM which is not visible
to the kernel .
say if my total memory size is 32 MB I pass mem=30 MB in boot
arguments.
So only 30 MB is visible to the kernel.

Then, I mmap from 30 to 32 MB in userspace using mmap system call.

mapmem = (unsigned char*)mmap((void *)0x0,(2*1024*1024),
PROT_READ | PROT_WRITE,MAP_SHARED,mem_fd, (30 *1024 *1024));

I m able to access this memory using mapmem.

I want to know whether this memory will come under cacheable memory or
not?

If it is cacheable , while accessing in user space I want to
invalidate the cache.
Is it possible?

In general, how to figure out whether a particular memory address is
cacheable or not?


Thanks!!

Gil Hamilton

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Jun 24, 2009, 8:00:19 AM6/24/09
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Jothy <saran...@gmail.com> wrote in news:ceed4579-9f3d-4f1a-8f4b-
06ff98...@v35g2000pro.googlegroups.com:

> I have a driver in which I mmap a portion of RAM which is not visible
> to the kernel .

> I want to know whether this memory will come under cacheable memory or


> not?
>
> If it is cacheable , while accessing in user space I want to
> invalidate the cache.
> Is it possible?
>
> In general, how to figure out whether a particular memory address is
> cacheable or not?

The answers to all your questions are architecture-specific and you've
provided no hints as to the architecture you're using.

GH

Saravana

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Jun 24, 2009, 9:15:43 AM6/24/09
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On Jun 24, 5:00 pm, Gil Hamilton <gil_hamil...@hotmail.com> wrote:
> Jothy <saranjo...@gmail.com> wrote in news:ceed4579-9f3d-4f1a-8f4b-
> 06ff985e2...@v35g2000pro.googlegroups.com:

>
> > I have a driver in which I mmap a portion of RAM which is not visible
> > to the kernel .
> > I want to know whether this memory will come under cacheable memory or
> > not?
>
> > If it is cacheable , while accessing in user space I want to
> > invalidate the cache.
> > Is it possible?
>
> > In general, how to figure out whether a particular memory address is
> > cacheable or not?
>
> The answers to all your questions are architecture-specific and you've
> provided no hints as to the architecture you're using.
>
> GH

The architecture is ARM (armv6). kernel version - 2.6.23

Thanks!!

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