Announcing APLAC
Bardo Muller
Enjoy,
Bardo
_______________________________________________________________________
Bardo MULLER Phone : [33] [1] 69 41 78 50
Institut d'Electronique Fondamentale Fax : [33] [1] 60 19 25 93
Bat. 220 Universite Paris Sud e-mail : ba...@ief-paris-sud.fr
91405 ORSAY CEDEX FRANCE
from nic.funet.fi:/pub/cae/aplac/INTRO
-----------------------------------------
APLAC 6.1 Introduction
-----------------------------------------
Background
----------
APLAC (originally Analysis Program for Linear Active Circuits) has been
under constant development in the Helsinki University of Technology
first in the Radio Laboratory and later on in the Circuit Theory
Laboratory. All the time the main goal of APLAC has been to give the
user full freedom in solving his/her problems without the restrictions
of conventional simulators. Remarkable improvement toward this goal took
place in 1985 when object-orientation was adopted in APLAC. The first
four generations of APLAC were written either in BASIC or in HP-BASIC
and PASCAL. The growing need for a portable, platform independent
version of APLAC lead to an initiative from the industry (Mobira, today
Nokia Mobile Phones) to create a fifth generation version of APLAC in
'C'-language.
As a result, Nokia Research Center joined the APLAC development team in
1988. At this time special attention was paid to the implementation of
the object-orientation in 'C'-language and to the microstrip component
modeling. In 1988 the Electronic Circuit Design Laboratory of the
Helsinki University of Technology has contributed to the Gummel-Poon
bipolar junction transistor modeling. Since 1989 the Semiconductor
Laboratory of the Technical Research Centre of Finland has participated
in the semiconductor device modeling. In 1991 the Solid-State
Microelectronics Laboratory of the Ohio State University contributed to
the statistical Mosfet During 1991 the six'th generation of APLAC was
created having improved convergence algorithms for DC, transient and
harmonic analyses and improved menu-driven actions. In addition
convolution technique was implemented enabling the use of frequency-
dependent components in the transient analysis of nonlinear circuits.
The object-orientation itself was realized by creating 'C'-macros which
take into account the specific needs of circuit simulation and
essentially simplify modeling. The object-orientation offers numerous
advantages like simplified coding and amazingly easy updating and
inclusion of new algorithms and models - a crucial point in large
programs which are steadily under long term development. As an extreme
example it should be mentioned that the change of numerical integration
algorithm requires only the modification of two program lines, one
consisting of the integration formula itself and the second including
the truncation error formula for automatic step size control. This opens
a fast way for testing the efficiency of various algorithms. The same
applies also, e.g., to the iteration algorithms solving the nonlinear
system equations. In addition - and this is very important - the object-
orientation opens up new vistas in the simulation methods by enabling
development of new algorithms which could never be realized using the
conventional procedural simulators like SPICE.
The conventional simulator sees the system equations as a whole without
knowing anything about the models which created the equations. This
unavoidably restricts the development of algorithms to the level of
matrices. If object-orientation is adopted it is possible to use
individual iteration and integration strategies on the model level - not
only so that, e.g., all Mosfets use one strategy and all Bjts another
one - but even so that the component itself decides which strategy to
use by observing its surrounding in the circuit. Thus - for example in
transient analysis - some Mosfets at that moment in a latent part of the
circuit might use long step and simple integration while Mosfets
elsewhere could utilize shorter step and a more advanced integration
formula.
Inclusion of a new model into APLAC requires the labour of introducing
the model parameters and writing the model equations under the frame
offered by the developed 'C'-macros. The code of APLAC itself remains
untouched. The user does not have to bother about the various analysis
modes of APLAC not to mention all the algorithms which in a conventional
simulator have direct implications in the model code. Even the APLAC
Interpreter immediately understands the syntax of the new model - again
an advantage of the object-orientation.
Analysis modes
--------------
APLAC is capable of carrying out DC, AC, noise, transient, oscillator
and multitone harmonic steady state and measurements using IEEE-488 bus.
Transient analysis treats through convolution correctly components
defined by frequency-dependent characteristics. Monte Carlo analysis K
is available in all basic analysis modes and sensitivity analysis in DC
and AC modes. N-port Z, Y, and S parameters K as well as two-port H
parameters K are available in AC analysis. In addition APLAC includes a
versatile collection of system level blocks for the simulation and
design of analog and digital communication
System simulation
-----------------
There are three basic ways to accomplish system simulations in APLAC:
You can define your own system components using the modeling
capability of APLAC Interpreter. For example, linear PLL
simulations are easy to implement in this manner (see PLL
simulations in System Simulations Manual Part I).
Especially if you are doing receiver design you may be
interested in the Formula-based system simulations (see System
Simulations Manual Part II). They can be applied to determine such
figures of merit as gain, intercept points, and compression point,
and to simulate such common receiver measurements as rf-sensitivity
and adjacent channel selectivity.
More general system simulations in the time domain can be made
using the Discrete-time system simulator (see System Simulations
Manual Part III). Using this simulator you can study the waveforms
and/or spectra in any nodes of your block diagram.
Basic models
------------
- asymmetric coupled line structure defined by electrical
parameters (Aclin)
- capacitance with parasitic inductance, resistance and
conductance (Cap)
- circulator (Circulator)
- coupled transmission line structure (Clin)
- coaxial line (Coax)
- voltage/current-controlled voltage/current source (CSource)
- independent current source (Curr)
- gyrator (Gyrator)
- ideal transformer (IdealTransformer)
- inductance with parasitic capacitance, resistance and
conductance (Ind)
- mutual inductance (Muc)
- general multilayer structure (MultiLayerStruct)
- ideal current or voltage noise source (NoiseSource)
- n-port with explicit Y parameters K (NPort)
- n-port with measured (computed) Z, Y, H or S parameter Ks
(NPort)
- linear operational amplifier (OpAmp)
- probe for oscillator analysis definition (OscVar, OscGoal)
- set of surface pads (Pad)
- resistance with parasitic capacitance, inductance and
conductance (Res)
- flat wire (Ribbon)
- rectangular inductor (Rind)
- ideal short circuit and ammeter (Short)
- spiral inductor (Spind)
- rational frequency domain transfer function to be used also in
the time domain (Tf)
- TEM-mode transmission line (TLine)
- dispersive TEM-mode transmission line (TLineDisp)
- independent voltage source with or without internal resistance
(Volt)
- round wire (Wire)
Microstrip models
-----------------
- coplanar waveguide with or without lower ground plane (Cpw)
- asymmetric coupled microstrip lines (Maclin)
- two asymmetric coupled microstrip lines (Maclin2)
- microstrip mitered and optimally mitered bend (Mbend)
- microstrip bend having arbitrary angle between 0 and 180
degrees (Mbend)
- symmetric coupled microstrip lines (Mclin)
- symmetrical microstrip cross junction (Mcros)
- microstrip gap (Mgap)
- microstrip Lange coupler (Mlange)
- arbitrary microstrip layout (Mlayout)
- microstrip line (Mlin)
- microstrip with open end (Mloc)
- short-circuited microstrip (Mlsc)
- microstrip rectangular inductor (Mrind)
- microstrip radial stub (Mrstub)
- narrow transverse slit in microstrip (Mslit)
- microstrip spiral inductor (Mspind)
- suspended-substrate or inverted microstrip line (Msslin)
- microstrip step (Mstep)
- microstrip substrate definition (Msub)
- tapered microstrip line (Mtaper)
- microstrip T-junction (Mtee)
- short-circuiting metallic post (Via)
Stripline models
----------------
- broadside-coupled stripline structure (Sbclin)
- stripline bend having arbitrary angle between 0 and 180
degrees (Sbend)
- symmetric edge coupled stripline structure (Sclin)
- single stripline (Slin)
- stripline with open end (Sloc)
- short-circuited stripline (Slsc)
- stripline substrate definition (Ssub)
Nonlinear models
----------------
- Gummel-Poon bipolar transistor model with distributed base
region (Bjt)
- mathematical Mosfet model (Bsim)
- pn-junction diode model (Diode)
- Dmos (Dmos)
- R- and C-dynamic element (DynElem)
- Igbt (Igbt)
- Jfet (Jfet)
- Josephson junction (Jj)
- Mesfet (Mesfet)
- Mosfet (Mosfet)
- operational amplifier (OpAmp)
- multiple voltage/current-controlled polynomial current/voltage
source (Poly)
- multiple voltage-controlled switch with stray capacitance
(Switch)
- transformer including hysteresis and saturation (Toroid)
- Ebers-Moll bipolar transistor model (Trans)
- multiple voltage/current-controlled current/voltage sources
(VCCS, CCCS, VCVS, CCVS)
- multiple voltage/current-controlled charge/flux (VCCS, CCCS,
VCVS, CCVS)
PLL simulation models
---------------------
- frequency divider (Divider)
- combined AC and/or step source (Inputsignal)
- linear model for phase detector (PhaseDetector)
- block computing the difference of two signals (Subtractor)
- block computing the sum of two signals (Summer)
- block linear model for voltage-controlled oscillator (VCO)
Formula-based system simulation models
--------------------------------------
- amplifier (Amplifier)
- antenna (Antenna)
- Chebyshev filter (ChebFil)
- duplex-filter (Duplexer)
- IF-circuit (IF_Circuit)
- isolator (Isolator)
- mixer (Mixer)
- oscillator (Oscillator)
- power divider (PowerDivider)
- filter defined by its S parameters K (TwoPort)
Discrete-time system simulation models
--------------------------------------
- analog-to-digital converter (Adc)
- logic four-bit adder (Adder)
- amplifier (Amplifier)
- amplitude modulator (AmplModulator)
- antenna (Antenna)
- attenuator (Attenuator)
- element having backlash nonlinearity (Backlash)
- nonlinear element for bandpass signals through AM/AM and AM/PM
conversion (BandpassNonLin)
- bit-error-rate meter (BerMeter)
- random bit source (BitGenerator)
- Butterworth bandpass filter (ButterworthBP)
- Butterworth bandstop filter (ButterworthBS)
- Butterworth highpass filter (ButterworthHP)
- Butterworth lowpass filter (ButterworthLP)
- elliptic bandpass filter (CauerBP)
- elliptic bandstop filter (CauerBS)
- elliptic highpass filter (CauerHP)
- elliptic lowpass filter (CauerLP)
- Chebyshev bandpass filter (ChebyshevBP)
- Chebyshev bandstop filter (ChebyshevBS)
- Chebyshev highpass filter (ChebyshevHP)
- Chebyshev lowpass filter (ChebyshevLP)
- clock source (Clock)
- block extracting the complex envelope of a bandpass signal
(ComplexEnvelope)
- voltage compressor (Compressor)
- block computing the correlation of two signals (Correlator)
- logic counter (Counter)
- digital-to-analog converter (Dac)
- decision device (Decision)
- delay element (Delay)
- demultiplexer circuit (Demultiplexer)
- D flip-flop (DFlip_flop)
- differential amplifier (DiffAmp)
- differentiator (Differentiator)
- downconverting mixer (Downconverter)
- ideal differentially coded PSK modulator (DPSKModulator)
- noise source with even distribution (EvenNoise)
- voltage expander (Expander)
- exponential source (Exponential)
- voltage-controlled voltage-source with user-defined formula
(Formula)
- frequency converter for bandpass signals (FreqConverter)
- frequency counter (FreqCounter)
- ideal frequency demodulator (FreqDemodulator)
- frequency divider (FreqDivider)
- filter designed using frequency sampling (FreqSamplingFil)
- Gaussian lowpass filter (GaussianLP)
- noise source with Gaussian distribution (GaussianNoise)
- 90-degree phase shifter (HilbertTransformer)
- FIR filter with given impulse response (ImpulseResponse)
- integrator (Integrator)
- JK flip-flop (JKFlip_flop)
- block defined by its Laplace transform (LaplaceTransform)
- limiter amplifier (Limiter)
- matched filter implemented by a FIR filter (MatchedFilter)
- median filter (MedianFilter)
- monostable multivibrator (Monostable)
- model for a multipath channel (Multipath)
- multiplexer circuit (Multiplexer)
- logic nand circuit (Nand)
- logic nor circuit (Nor)
- logic not circuit (Not)
- user-given power of the input signal (NthPower)
- oscillator with selectable waveform (Oscillator)
- ideal phase demodulator (PhaseDemodulator)
- linear model for phase detector (PhaseDetector)
- ideal phase modulator (PhaseModulator)
- phase shifter (PhaseShifter)
- filter with single pole at the origin (Pole)
- nonlinear element defined by a polynomial (Polynomial)
- element estimating the probability distribution and ddensity
functions of a random signal (Probability)
- parallel-in/serial-out shift register (PSShiftRegister)
- pulse source (Pulse)
- element producing a random or pre-defined jitter (PulseJitter)
- analog pulse modulator (PulseModulator)
- piecewise linear voltage input-output characteristics (PWL)
- quadrature amplitude modulator (QAModulator)
- quantizer (Quantizer)
- raised cosine lowpass filter (RaisedCosineLP)
- ramp source (Ramp)
- RC highpass filter (RCHP)
- RC lowpass filter (RCLP)
- generator reading its output signal from a file (ReadFile)
- rectifier (Rectifier)
- sample-and-hold circuit (SampleHold)
- Schmitt trigger (Schmitt)
- signal-to-noise ratio meter (SnrMeter)
- spectrum analyzer (SpectrumAnalyzer)
- serial-in/parallel-out shift register (SPShiftRegister)
- block storing a signal waveform to a file (StoreFile)
- summer of signals (Summer)
- device computing the time average of a signal and its power
(TimeAverage)
- indicator for low-to-high or high-to-low transition of a logic
signal (TrigPulse)
- filter defined by its S parameters K (TwoPort)
- upconverting mixer (Upconverter)
- voltage-controlled amplifier (Vca)
- voltage-controlled oscillator (Vco)
- voltage source (Voltage)
- baseband waveform generator (Waveform)
- lowpass filter designed using a window function (WindowLP)
- parallel bit generator (WordGenerator)
- block transforming a logic word to a decimal number
(WordIndicator)
- logic exclusive-or circuit (Xor)
- filter having single zero at the origin (Zero)
- block defined by its z-transform (ZTransform)
VCCS, CCCS, VCVS and CCVS (actually VCCS alone because all other
components are mapped onto it with the aid of Gyrator) are the key
components for the creation of new user models.
The model parameters of various components may have any functional
dependencies on frequency, time, temperature or any other parameter. The
user is allowed to create new components by defining the nonlinear
static and dynamic characteristics. Macro models can also be used. The
user models are written in APLAC Interpreter language.
Sweep
-----
Multiple parameter series and parallel linear, logarithmic and tabular
sweeps with zooming ranges may be automatically carried out for any
number of circuit parameters, or time, frequency and temperature. With
the aid of APLAC Sweep K model characteristics, temperature effects and
gain-power characteristics, e.g., may easily be presented.
Input
-----
The input is read from a text file including the nodes, branches and
model parameters of the components, and the problem definition. The
input file can be written using any text editor or a suitable schematic
capture programme (such as NASSE or Mentor/MAPLAC) that automatically
generates the APLAC Input File from a circuit or block diagram. A model
library as well as user-defined new models may be created and included.
The input interpreter understands all normal standard functions.
Mathematical expressions are written in a program-like manner and new
parameterized functions may be defined. The interpreter allows real and
complex scalar, vector and matrix arithmetic, string operations, for-,
while- and repeat-until-loops as well as if-then-else-structures.
Output
------
The output is any user-defined function of the circuit parameters, time,
frequency, or temperature, as well as analysis or measurement result.
The analysis result may consist of voltages and currents, Z, Y, H and S
parameter Ks, the determinant of S matrix, two-port stability factor K,
maximum available and stable gain as well as generator and load
stability and constant power circles on the Smith chart, harmonic
distortion, periodic waveform and spectral components in the harmonic
and oscillator analyses, noise figure, noise temperature, constant noise
circles on the Smith chart, minimum noise reflection coefficients, noise
correlation admittances, DC and AC sensitivities, and yield. In
addition, a large number of functions characterizing PLL, formula-based
or discrete-time systems is available. The results may be printed or
plotted on rectangular or polar coordinates, or on the Smith chart. It
is also possible to redirect the graphics output to a HPGL- or CSDF-
file, or to an APLAC Input File for later viewing.
Optimization
------------
APLAC 6.1 includes seven different optimization methods: gradient,
conjugate gradient, minmax, random, simulated annealing, tuning (manual
optimization) and gravity center (design centering). Any parameter in
the design problem can be used as a variable and any user-defined
function may act as an objective. Thus also combined time and frequency
domain optimization is possible, for example. E-series values may be
used in simulated annealing, random and manual optimizations.
Contact information
-------------------
For more information, please contact:
Martti Valtonen Heikki Rekonen
Helsinki University of Technology Nokia Research Center
Circuit Theory Laboratory Hardware Design Technology
Otakaari 5 A P.O.Box 156
SF-02150 Espoo SF-02101 Espoo
Finland Finland
Fax: 358-0-460224 Tel: 358-0-43761
e-mail:mar...@aplac.hut.fi Fax: 358-0-455 2557
Nurmi Jari,,,SIG,48962
> Amazing what the net holds.
>
> from nic.funet.fi:/pub/cae/aplac/INTRO
>
> -----------------------------------------
> APLAC 6.1 Introduction
> -----------------------------------------
...and in addition to all the listed properties, libraries, etc. the
APLAC simulations can now also be distributed to a workstation network
(PAR-APLAC). This feature was of course developed in Tampere
University of Technology, Signal Processing Laboratory...
--
Jari Nurmi # nu...@cs.tut.fi
Acting Associate Professor # office: +358 31 316 2501 fax: 316 1857
Signal Processing Laboratory # home: 464 812 mobile: +358 49 635 921
Tampere University of Technology, PO Box 553, SF-33101 Tampere, Finland
Roger A Williams
and Nokia's pricing structure would seem to make the full package a bit
pricey for independent consultants.
Roger Williams | "Most great discoveries are made
rog...@world.std.com | by accident: the larger the
consulting engineer | funding, the longer it takes to
Middleborough, Mass. | have that accident."
Sakari Aaltonen
>Unfortunately, the demo version doesn't include any of the system models,
The demo version now includes the system library, and has for some time.
No, it did not always (include it).
--
Sakari Aaltonen | Linux is an ftp-able Unix clone for 386/486 PC's.
sak...@vipunen.hut.fi | Boggles *my* mind, it does.
sak...@aplac.hut.fi
Roger A Williams
>In article <CA48C...@world.std.com> rog...@world.std.com (Roger A Williams) writes:
>>Unfortunately, the demo version doesn't include any of the system models,
>>................................................
>The demo version now includes the system library, and has for some time.
Good news. Thanks for correcting my mistake.