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master-slave JK flip flop vhdl model need

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Attila Csosz

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Nov 15, 2002, 1:54:50 PM11/15/02
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Could you give me (or a link) a simple master-slave JK flip flop model?
I searched some books and the internet but I found only non master slave
models.

Thanks
Attila

AleCapo

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Nov 15, 2002, 4:13:39 PM11/15/02
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well Attila, if I understood correctly, it's not so hard to make a JK FF
model.

process(clk, reset)
if reset = 0 the q <= '0'
else if clk ...
if J and K = ... then q <= '1' elsif ...


Attila Csosz <acs...@mail.datanet.hu> wrote in message
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Attila Csosz

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Nov 15, 2002, 4:38:13 PM11/15/02
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If it possible I need a complete model. I've the normal but it's not
master-slave capable.

Thanks


AleCapo wrote:

> well Attila, if I understood correctly, it's not so hard to make a JK FF
> model.


I know ..

>
> process(clk, reset)
> if reset = 0 the q <= '0'
> else if clk ...
> if J and K = ... then q <= '1' elsif ...
>
>
>
>

> Attila Csosz wrote in message
> ar3fqo$mko$1...@namru.matavnet.hu...

BILL GRUBBS

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Nov 16, 2002, 8:04:05 AM11/16/02
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Look up the schematic for a ms jk ff in the ttl databook and write the vhdl
code for the logic as shown.


"Attila Csosz" <acs...@mail.datanet.hu> wrote in message

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