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nested process

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mesf...@my-dejanews.com

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Apr 14, 1999, 3:00:00 AM4/14/99
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hello guys, I'm confused:

lets say I have two process

P1:process(a)
begin
b<= a;

P2:process(a)
c <= a;

end process;
end process;

my question is: when first "a" changes and I enter process "P1" and "b<=a"
then do I enter "P2" when a changes again and c<=a?

what I mean is that in the first clock cycle when a changes then b has the
value of a, then when a changes again (next clock cycle) c has the new value
of a.

is that right?


thanks

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Renaud Pacalet

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Apr 14, 1999, 3:00:00 AM4/14/99
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Did you compile this successfully ? It's the first time I see such
nested process scheme. Is it a VHDL'93 feature ?
--
Renaud Pacalet, ENST / COMELEC, 46 rue Barrault 75634 Paris Cedex 13
Tel. : 01 45 81 78 08 | Fax : 01 45 80 40 36 | Mel : pac...@enst.fr

me...@mench.com

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Apr 14, 1999, 3:00:00 AM4/14/99
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mesf...@my-dejanews.com wrote:
> lets say I have two process

> P1:process(a)
> begin
> b<= a;

> P2:process(a)
> c <= a;

> end process;
> end process;

> my question is: when first "a" changes and I enter process "P1" and "b<=a"
> then do I enter "P2" when a changes again and c<=a?

> what I mean is that in the first clock cycle when a changes then b has the
> value of a, then when a changes again (next clock cycle) c has the new value
> of a.

> is that right?

Nope. Processes may not be nested. This is illegal code.

Paul

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Paul Menchini | me...@mench.com | "Non si vive se non il
OrCAD | www.orcad.com | tempo che si ama."
P.O. Box 71767 | 919-479-1670[v] | --Claude Adrien Helvetius
Durham, NC 27722-1767 | 919-479-1671[f] |

John Hong

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Apr 14, 1999, 3:00:00 AM4/14/99
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you may check out "block" feature in VHDL if that's what you want.

mesf...@my-dejanews.com wrote:

> hello guys, I'm confused:
>

> lets say I have two process
>
> P1:process(a)
> begin
> b<= a;
>
> P2:process(a)
> c <= a;
>
> end process;
> end process;
>
> my question is: when first "a" changes and I enter process "P1" and "b<=a"
> then do I enter "P2" when a changes again and c<=a?
>
> what I mean is that in the first clock cycle when a changes then b has the
> value of a, then when a changes again (next clock cycle) c has the new value
> of a.
>
> is that right?
>

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