TextIO Tutorial
Dek
I'm new to VHDL an to this group too; as an exercise I'm trying to
import data from several files using package TextIO, but I haven't
found yet a good manual or tutorial about it; may you suggest me some?
Thanks
Bye
Dek
Mike Treseler
> I'm new to VHDL an to this group too; as an exercise I'm trying to
> import data from several files using package TextIO, but I haven't
> found yet a good manual or tutorial about it; may you suggest me some?
When I want to work with files and data, i use python or perl.
If I want to make a hardware model, I use vhdl.
-- Mike Treseler
Tricky
If you're only trying to read in text, then TextIO is what you need.
For binary files, you dont use the TextIO package, and reading data in
is a bit more contrived and apparently doesnt work the same accross
different apps. (as a note, I have functions to read/write bitmap
files directly from VHDL in Modelsim but thats only because I work
with video and looking at an actual picture is alot quicker than
trying to interpret text).
But like Mike says, if its for anything other than input to a hardware
model, use something else to do the work. It might be best to just ask
the questions here, or go on the Doulos VHDL courses.
Dek
Thanks for the answer,
what I want to do actually is an hardware model using a .txt file for
the testbench. I' m trying to read different lines from a single file,
and different data from a single line, and writing the same. Where can
I find Doulos VHDL courses?
Thanks
Bye
Dek
>
> - Mostra testo citato -
For example I wrote this code:
--------------------------------------------------------------------
USE std.textio.all;
ENTITY form_IO IS
--empty
END form_IO;
ARCHITECTURE formatted OF form_IO IS
BEGIN
PROCESS IS
FILE formout : Text ;
VARIABLE int : Integer := 5 ;
VARIABLE buf : Line ;
VARIABLE fstatus : File_open_status ;
BEGIN
File_open(fstatus, formout, "C:/Users/Daniele/Desktop/Esercizi/
form_io.txt", write_mode);
L1:write (buf, "This is an example of formatted I/O");
L2:writeline (formout, buf);
L3:write (buf, "Integer int=");
L4:write (buf, int);
L5:writeline (formout, buf);
L6:file_close(formout);
wait;
END PROCESS;
END formatted;
-----------------------------------------------------------------
but I got the following error message:
# ** Error: C:/Users/Daniele/Desktop/Esercizi/Format_IO.vhd(24):
Subprogram 'write' is ambiguous.
# ** Error: C:/Users/Daniele/Desktop/Esercizi/Format_IO.vhd(24): No
feasible entries for subprogram "write".
# ** Error: C:/Users/Daniele/Desktop/Esercizi/Format_IO.vhd(26):
Subprogram 'write' is ambiguous.
# ** Error: C:/Users/Daniele/Desktop/Esercizi/Format_IO.vhd(26): No
feasible entries for subprogram "write".
# ** Error: C:/Users/Daniele/Desktop/Esercizi/Format_IO.vhd(33): VHDL
Compiler exiting
where am I wrong?
Thanks
Bye
Jonathan Bromley
> File_open(fstatus, formout, ".../form_io.txt", write_mode);
> L1:write (buf, "This is an example of formatted I/O");
> L2:writeline (formout, buf);
> L3:write (buf, "Integer int=");
> L4:write (buf, int);
> L5:writeline (formout, buf);
> L6:file_close(formout);
>
>but I got the following error message:
>
># ** Error: C:/Users/Daniele/Desktop/Esercizi/Format_IO.vhd(24):
>Subprogram 'write' is ambiguous.
>
>where am I wrong?
OK, that one's easy...
There are at least eight different versions of "write".
The version to write a string looks, to the compiler,
exactly the same as the version to write a bit-vector:
write(buf, "1011"); -- String or bit-vector???
Hence the "ambiguous" error message. There are two
possible fixes:
1) Type-qualify the string:
write(buf, string'("My message"));
2) Create a specialised version of "write", with a
different name, to deal with the very common problem
of writing a string message:
procedure WrStr(L: inout line; S: in string) is
begin
write (L, S); -- No ambiguity; S is of string type
end;
Now you can do simply
WrStr(buf, "My message");
and all will be well.
FOOTNOTE for the nitpickier members of c.l.vhdl:
The simple implementation of WrStr, above, is
incomplete. To provide the full facilities of
"write", complete with formatting, you need this
slightly more complex version:
procedure WrStr
( L : inout line
; S : in string
; JUSTIFIED : in SIDE := right
; FIELD : in WIDTH := 0
) is
begin
write(L, S, JUSTIFIED, FIELD);
end;
Of course, thanks to the default arguments you can
still call it like this if you wish:
WrStr(buf, "message");
--
Jonathan Bromley, Consultant
DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services
Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan...@MYCOMPANY.com
http://www.MYCOMPANY.com
The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
Bert_Paris
> L1:write (buf, "This is an example of formatted I/O");
You need to use qualified expressions :
L1:write (buf, string'("This is an example of formatted I/O"));
I personnaly use often the trick to concatenate a character.
"Hello" & HT becomes automatically a string (it's not ambiguous any
more)
We teach this in the Doulos course ;-)
Bert
Dek
wrote:
>
> The contents of this message may contain personal views which
> are not the views of Doulos Ltd., unless specifically stated.
Thank you very much
now it works properly
Dek
Thank you all,
now it works properly, but I didn't get how to concatenate a
character;
what should I write?
Thanks
Bye
HT-Lab
"Dek" <daniele...@gmail.com> wrote in message
news:e577ffcf-1762-4bd8...@a7g2000yqk.googlegroups.com...
Hi Dek,
As has been suggested a number of times on this newsgroup you might want to
check out the VHDL stdio package:
http://bear.ces.case.edu/VHDL/index.html
if you know C than this package makes textio a lot easier (at least I think
it does),
Hans
www.ht-lab.com
Bert_Paris
"Hello" & HT
Dek
>
> - Mostra testo citato -
Nice trick,
thanks again
JimLewis
> 2) Create a specialised version of "write", with a
> different name, to deal with the very common problem
> of writing a string message:
>
> procedure WrStr(L: inout line; S: in string) is
In the VHDL-2008 language revision, the following alias
was added to std.textio:
alias SWRITE is WRITE [LINE, STRING, SIDE, WIDTH];
You call SWRITE just like Jonanthan's WrStr.
I have been using some of the supported VHDL-2008
features in both ModelSim and Aldec. If you have the
latest versions, I suspect this is in the supported list.
Cheers,
Jim
SynthWorks VHDL Training
P.S.
If you are in the US, SynthWorks also covers textio
and has regularly scheduled classes.
http://www.synthworks.com
Jonathan Bromley
>In the VHDL-2008 language revision, the following alias
>was added to std.textio:
>
>alias SWRITE is WRITE [LINE, STRING, SIDE, WIDTH];
And, of course, you can write the alias for yourself
if you don't have it in your local version of std.textio.
The alias is much cooler (and, I guess, more efficient)
than my proxy procedure, but I didn't mention it for
two reasons:
1) I reckon the proxy is easier to understand for newbies,
2) I'd completely forgotten about the possibility :-(
Mike Treseler
> what I want to do actually is an hardware model using a .txt file for
> the testbench. I' m trying to read different lines from a single file,
> and different data from a single line, and writing the same.
It is quite common for new vhdl testbenchers
to try to write a text script and interpret it using
textio rather than learning how to use
vhdl types and procedures.
I will decline to elaborate because
I don't think this is a good idea.
> Where can I find Doulos VHDL courses?
-- Mike Treseler
Dek
I think I can't do anything better, because I have to simulate how an
FPGA would work on data coming from a detector, that are already
stored in many .txt files.
Now the problem is that such files are thousands and it takes a lot of
time to change manually their name in vhdl code. One idea is to use
Generics, name all data files in a "name.do" file and use "do name.do"
command. Even in this case, however, I have to name files manually one
by one. Do you know if there is a way to read all files in a folder
without nameing them?
The same problem, unfortunately, is for writing, since for each in-
file I have to write one out-file.
Thanks
Bye
bk...@hotmail.com
You may see this page as an example for text io usyage.
...
Sometimes simulation are very long, which makes it impossible to
record waves for the entire simulation. The monitor helps you locate
those areas, which need debug and waves.
...
http://bknpk.no-ip.biz/AHB_MON/ahb_mon_1.html
KJ
> I think I can't do anything better, because I have to simulate how an
> FPGA would work on data coming from a detector, that are already
> stored in many .txt files.
>
One could ask how did those files get created in the first place. Unless
they were generated from an actual detector, then they were artificially
generated in the first place. Rather than artificially generating data into
text files and then figuring out how to read them into a testbench it is
much more productive to model the detector in the VHDL testbench and totally
bypass file I/O (which is not really one of VHDL's strengths).
But I'll assume though that you have to work with file I/O.
> Now the problem is that such files are thousands and it takes a lot of
> time to change manually their name in vhdl code. One idea is to use
> Generics, name all data files in a "name.do" file and use "do name.do"
> command. Even in this case, however, I have to name files manually one
> by one.
Not really. The name.do file can be easily created with a simple directory
listing command
(Windows command line "dir /b >name.do"). That's pretty easy to do.
> Do you know if there is a way to read all files in a folder
> without nameing them?
I don't.
> The same problem, unfortunately, is for writing, since for each in-
> file I have to write one out-file.
>
Once you've read in a line from 'name.do' you've got a unique input file
name. I would construct a similarly unique output file name by modifying
the input file name in some fashion (say by appending ".out" to the input
file name).
Kevin Jennings
HT-Lab
Look into using Tcl which if fully integrated with Modelsim. To read a
directory simply use the "glob *" command followed by a "foreach" to handle
each filename. Other useful Tcl Modelsim commands are force/when and examine
(see manual),
Hans
www.ht-lab.com
Dek
> "Dek" <daniele.deq...@gmail.com> wrote in message
>
> - Mostra testo citato -
Thanks all
I think I'll try first the idea of KJ; since I'm just learning VHDL
and ModelSim, I'll leave Tcl for the future.
Thanks again
Bye
Dek
Dek
Ok, I'll definitively thank this group in my thesis! Your idea seems
to work, but there is still a little problem:
the name are of different length! If i do like this:
-----------------------------------------------
Architecture...
Begin
process
VARIABLE filename : String (23 downto 1);
-----------------------------------------------
it works until it find a filename of lenght different from 23.
I tried to do something like this:
VARIABLE filename : String;
or
VARIABLE filename : String (natural range<>);
but I always get an error message.
Have any suggestion?
Thanks
Dek
Tricky
I assume you are reading the string from a line? well, a line is
actually a pointer to a string.
So, assuming you just have 1 filename per line, you can do something
like:
readline(namefile, inline);
FILE_OPEN(f, inline.all, READ_MODE);
DEALLOCATE(inline); --drops the pointer
You could do the same if its not just 1 file name per line, but the
parsing would get more complicated. But the method above means you can
have filenames as long as you want.
Dek
>
> - Mostra testo citato -
Sorry but I didn't get what you mean; When I use the deallocate
command don't I lose all informations pointed by inline? If I
understood right the deallocate command serves to free memory, so if
I
write :
DEALLOCATE(inline);
I will free the memory block used to store the contents of infile;
how
can I find the same contents in a string whose lenght is not
constrained?
Another question: is there a command to know the lenght of a line?
Because I could do so:
READFILE (infile, inline);
int := LENGHT (inline); -- int already defined as an integer
than i could continue with an IF clause. Unfortunately LENGHT is not
the right keyword.
Thanks again
Dek
>
> - Mostra testo citato -
Ok found the right command:
int := inline'Length;
Bye!
Tricky
the READLINE function just copies the next line from the file into
"inline". if you call DEALLOCATE(inline) you are just removing the
pointer to the copy of the line, the file itself is unnaffected and
the next call to readline will correctly read off the next line from
the file.
the previous example still stands. I was only using DEALLOCATE because
I wasnt actually reading anything from the line, I was dereferencing
the pointer with the inline.all call. if you dont deallocate it
without reading all the data off it, the next readline call will just
append the next line onto the end of whatever is left (and in my
example, the whole line would be left)
so the following example is still good, assuming you dont have
anything else on the line other than the filename:
readline(namefile, inline);
FILE_OPEN(f, inline.all, READ_MODE);
DEALLOCATE(inline); --drops the pointer
the good thing about this method is you dont need to declare a string
to read the data off "inline" and restrict it's length, you can just
use the line itself, as the "line" type is just a pointer to a string.
Dek
>
> - Mostra testo citato -
Ok, I think I should explane better what I have to do; my purpose is
to write something like this:
----------------------------------------------------------------------------------------------------------------
READLINE ( filein, buf1); --filein: file where names
are stored; buf1 e buf2 defined as a line;
READ (buf1, filename); --filename define as a
string
WRITE ( buf2, string'("My command 1"));
Write (buf2, filename);
WRITE ( buf2, string'("My command 2"));
WRITELINE (fileout, buf2);
----------------------------------------------------------------------------------------------------------------
Now, I tried to write something like this:
------
readline ( namefile, L);
FILE_OPEN(namefile, L.all, READ_MODE);
DEALLOCATE(L); --drops the pointer
write (buf, L);
writeline (outfile, buf);
--------
but it doesn't work; It would be really nice to don't be forced
declaring string lenght, but I didn't understood yet how to use
properly the deallocate command.
Thanks
Bye
Mike Treseler
> but it doesn't work; It would be really nice to don't be forced
> declaring string length, but I didn't understood yet how to use
> properly the deallocate command.
Consider using the REPORT command for text, and get on
with the testbench.
TextIO has already stolen two weeks of your time.
-- Mike Treseler
JimLewis
Here is something I have used. Make sure that FileName length (20
here)
is big enough to allow you to get the file name. This assumes that
there is no white space at the end of the line. Note though I used
this in a toy program. I only read files for testbenches when I have
a big data set to read in, like a video image or something of that
sort.
use std.textio.all;
TestProc : process
File TestFile : Text ;
variable FileInLine : Line ;
variable FileName : string (1 to 20 ) ;
variable NameLength : natural ;
begin
Write( OUTPUT, "File Name to Read: " & LF);
Read ( INPUT, FileName, NameLength) ;
if (FileName(NameLength) = LF) then
NameLength := NameLength - 1 ;
end if ;
file_open(TestFile, FileName(1 to NameLength), READ_MODE);
Best,
Jim
SynthWorks VHDL Training
JimLewis
tedious
Main : Process
begin
write(WriteBuf, String'("Enter File Name to Read: ")) ;
writeline(OUTPUT, WriteBuf) ;
Readline (INPUT, ReadBuf) ;
i := 1 ;
loop
Read(ReadBuf, InputString(i), Valid) ;
exit when not Valid ;
i := i + 1 ;
end loop ;
if i = 1 then wait; end if ; -- add error handling here
file_open(TestFile, InputString(1 to i-1), READ_MODE) ;
JimLewis
> This one handles spaces on the same line as the name, but is much more
> tedious
>
> Main : Process
>
> begin
> write(WriteBuf, String'("Enter File Name to Read: ")) ;
> writeline(OUTPUT, WriteBuf) ;
> Readline (INPUT, ReadBuf) ;
> i := 1 ;
> loop
> Read(ReadBuf, InputString(i), Valid) ;
exit when not Valid or InputString(i) = ' ' or InputString(i) =
HT ;
Dek
Thanks all, it seems a good idea, but finally I used Tcl, it's quite
simple
Bye
Dek
Mike Treseler
> Thanks all, it seems a good idea, but finally I used Tcl, it's quite
> simple
Glad you saw the light.
tcl is much better at text than vhdl,
as is python, bash script, emacs-lisp, perl, ...
-- Mike Treseler
Dek
Hemm... actually I used Tcl just as a macro to be used with modelsim
(as HT-Lab suggested); in my VHDL TextIO is still present, but since I
use the files name as generics, they don't have to be constrained
anymore.
Maybe, as you say, I did better if I used just Tcl or Python or so on,
but I want to take confidence with VHDL for further applications, and
I had data from an actual detector already stored in .txt files.
Anyway I think it's nice to know how TextIO works because, even if
it's not very powerful, it gives you the chance to understeand how an
hardware model would work on data already stored; and I don't think
this is a so rare application.
Mike Treseler
>>> Thanks all, it seems a good idea, but finally I used Tcl, it's quite
>>> simple
Dek wrote:
> Hemm... actually I used Tcl just as a macro to be used with modelsim
> (as HT-Lab suggested); in my VHDL TextIO is still present, but since I
> use the files name as generics, they don't have to be constrained
> anymore.
Sorry that I misinterpreted your posting.
Congratulations for conquering textio.
> Maybe, as you say, I did better if I used just Tcl or Python or so on,
> but I want to take confidence with VHDL for further applications, and
> I had data from an actual detector already stored in .txt files.
I prefer to convert existing text files to vhdl packages
using a scripting language, since I am using one anyway
to run modelsim. This isn't better, just different.
-- Mike Treseler