MIPS or MOPS?
AAP3
I wrote some functions for a CDMA receiver and I want to find the number of
MIPS required by each function. How do I calculate it?
and which is more accurate measure, MIPS or MOPS?
More info:
data rate 2Mbps.
system clock 50MHz.
4 time over sampling.
16 Spreading factor.
Thanks.
Murali Jayapala
As far as I know MIPS stands for Millions of instructions per second and MOPS
is millions of operations per second.
Now if you have mapped the algorithm on a VLIW/parallel machine, then each
'instruction' has more than one 'operation'. However if the platform is a
risc machine then each instruction has just one operation. So in case of
parallel machines it would be fair to evaluate through MOPS., while in risc
machines MOPS and MIPS both signify the same result..
-MJ
Sander Vesik
> I guess the first step is to check the proper definitions of MIPS and MOPS.
> As far as I know MIPS stands for Millions of instructions per second and MOPS
> is millions of operations per second.
> Now if you have mapped the algorithm on a VLIW/parallel machine, then each
> 'instruction' has more than one 'operation'. However if the platform is a
> risc machine then each instruction has just one operation. So in case of
Wrong - consider any SIMD instructions (practicly all risc processors have
them these days) or for that matter, muladd.
> parallel machines it would be fair to evaluate through MOPS., while in risc
> machines MOPS and MIPS both signify the same result..
Well... most dsp processors advertise both, esp as they do have muladds and
similar...
> -MJ
> AAP3 wrote:
>> Hi..to all
>> I wrote some functions for a CDMA receiver and I want to find the number of
>> MIPS required by each function. How do I calculate it?
>> and which is more accurate measure, MIPS or MOPS?
>> More info:
>> data rate 2Mbps.
>> system clock 50MHz.
>> 4 time over sampling.
>> 16 Spreading factor.
>>
>> Thanks.
--
Sander
+++ Out of cheese error +++
Murali Jayapala
> them these days) or for that matter, muladd.
>
But isnt the granularity of each of the operation in a SIMD instruction smaller
than one 'regular' opertation ?. It would be fair to compare operations of similar
granularity. In vliw archs, each operation in an instruction have graularity
similar to one of regular risc style instruction. While the graularity of one SIMD
instruction still has same granularity as the granularity of one regular risc
instruction (even though each SIMD might have more than one operation). Isnt this
true?? I am still under the impression that this is true.... but I could be wrong.
-MJ
Murali Jayapala
> > Wrong - consider any SIMD instructions (practicly all risc processors have
> > them these days) or for that matter, muladd.
> >
>
> But isnt the granularity of each of the operation in a SIMD instruction smaller
> than one 'regular' opertation ?. It would be fair to compare operations of similar
> granularity. In vliw archs, each operation in an instruction have graularity
> similar to one of regular risc style instruction. While the graularity of one SIMD
> instruction still has same granularity as the granularity of one regular risc
> instruction (even though each SIMD might have more than one operation). Isnt this
> true?? I am still under the impression that this is true.... but I could be wrong.
Oops sorry about that.. I think I am wrong here. I was thinking of sub-word parallel
instructions in SIMD style...
-MJ
Rupert Pigott
Err, wouldn't you get more progress by coming up with some code and
calculating worst case cycle counts ?
Cheers,
Rupert
AAP3 <aa...@dr.com> wrote in message
news:wRXT7.584$B47.9...@typhoon.columbus.rr.com...
glen herrmannsfeldt
>I guess the first step is to check the proper definitions of MIPS and MOPS.
>As far as I know MIPS stands for Millions of instructions per second and MOPS
>is millions of operations per second.
>Now if you have mapped the algorithm on a VLIW/parallel machine, then each
>'instruction' has more than one 'operation'. However if the platform is a
>risc machine then each instruction has just one operation. So in case of
>parallel machines it would be fair to evaluate through MOPS., while in risc
>machines MOPS and MIPS both signify the same result..
The current definition of MIPS that I know of is:
"Meaningless Indicator of Processor Speed" which makes sense
under current architectures.
Some people still find MFLOPS, Millions of Floating point Operations
Per Second still useful, though it might make some difference if
those operations were addition, multiplication, or division.
Mostly this is interesting for some scientific programs that are
mostly floating point and the number of floating point operations
scales nicely with the problem size. For example, multiplying two
N by N matrices takes pretty much N**3 floating multiply and N**3
floating add instructions, and the loop operations can likely be
done in parallel. Running the program for different N and scaling
by 2*N**3 will tell you how long it will take for not too small
(startup overhead) or too large (page thrashing) N's.
-- glen
-- glen