type row is array (cmd_buffer_word downto 0) of std_logic;
type cmd_buffer is array (cmd_buffer_depth downto 0) of row;
now, how could I transfer the whole 32 bits data inside a vector called
cmd_tmp_buffer into the second row of my cmd_buffer?
This following line is wrong, but it may help you understand what I'm
trying to do:
cmd_buffer(1, 31 downto 0) <= cmd_tmp_buffer(31 downto 0);
Thanks,
Marco
You are confusing an "array of arrays" with a multi-dimensional array. You
may also be confusing a type with a signal.
First you need to declare a signal of type cmd_buffer:
signal my_cmd_buffer : cmd_buffer;
Given this definition, you should write:
my_cmd_buffer(1)(31 downto 0) <= cmd_tmp_buffer(31 downto 0);
Or, if the constant cmd_buffer_word is in fact 31, you can write simply:
my_cmd_buffer(1) <= cmd_tmp_buffer; -- much nicer!
Usually an array of arrays works out easier (in terms of syntax) than the
equivalent 2-D array. However, sometimes only a 2-D array type will do (for
example, if both dimensions have to be of arbitrary size at the point of
definition).
HTH,
-Ben-
1) signal cmd_tmp_buffer : std_logic_vector(31 downto 0);
2) type cmd_buffer_type is array (31 downto 0) of std_logic;
signal cmd_tmp_buffer : cmd_buffer_type;
Marco
This is probably because of VHDL's strong typing. What type is
cmd_tmp_buffer?
If it is a std_logic_vector, then it is not of the same type as the rows of
my_cmd_buffer (which are of type row).
You should probably change your definition of type "row" to this:
subtype row is std_logic_vector(cmd_buffer_word downto 0);
Then your types will be compatible again.
Cheers,
-Ben-
This is very confusing without being able to see all the code! :)
I just managed to compile the following succesfully, FWIW:
subtype my_word_t is std_logic_vector(31 downto 0);
type my_word_array_t is array(0 to 3) of my_word_t;
signal my_word1, my_word2 : my_word_t;
signal my_array : my_word_array_t;
my_array(1) <= my_word1;
my_word2 <= my_array(2);
Cheers,
-Ben-