The easiest way to implement the printf("%d\n", var) function in VHDL is by using VHDL-93. The solution would be as follows:
...
architecture tb of design_testbench is
file output : text open write_mode is "output.dat";
...
variable li : line;
...
write (li, string'("The number is: ") & integer'IMAGE(i));
writeline ( output, li );
The IMAGE attribute is just great and works also with other variable types. If your design is in VHDL-87 you still can mix VHDL-93 testbench files (at least with Modelsim).
Regards,
Umesh Gowda
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Jerome Chaix <jerome...@mentorg.com> writes:
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>Is there an existing function in VHDL which is the equivalent of
>printf(%d, var) in language C ?
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>Content-Transfer-Encoding: 7bit
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>end:vcard
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Jerome Chaix wrote:
> Is there an existing function in VHDL which is the equivalent of
> printf(%d, var) in language C ?
There is a C-style fprintf package available free upon request
from www.easic.com . See
http://www.easics.com/method/inhouse.html
--
Edwin
is it
assert false
report "<message>"
severity NOTE;
I've only started using VHDL recently but I think this is right.
Paul Mc Canny