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incrementing std_logic_vector

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rattle

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May 12, 2000, 3:00:00 AM5/12/00
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anyone know how to increment std_logic_vectors

Gardiner, Charles

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May 12, 2000, 3:00:00 AM5/12/00
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One solution using the available conversion functions is the rather unwieldy syntax
of

sResult <= conv_std_logic_vector(conv_integer(unsigned(sOperand)) + 1,
sOperand'length);

Regards,
Charles

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Eric B.

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May 12, 2000, 3:00:00 AM5/12/00
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You can also use std_logic_unsigned:

library ieee;
use ieee.std_logic_unsigned.all;

sResult <= sOperand + '1';


Eric

"Gardiner, Charles" <charles....@mchr2.siemens.de> wrote in message
news:391BB3D6...@mchr2.siemens.de...

Craig

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May 12, 2000, 3:00:00 AM5/12/00
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That only works if you have the second source library. IEEE does not define an
unsigned nor signed library. Those are usually provided
by the synthesis tool or the simulator. They are probably avaliable on line.
Also you could just write your own package overloading the operators, which
could easily be done.

Andy Peters

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May 12, 2000, 3:00:00 AM5/12/00
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Craig wrote in message <391C19B4...@pacbell.net>...

"IEEE does not define an unsigned nor signed library."

Uh, numeric_std?

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VhdlCohen

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May 12, 2000, 3:00:00 AM5/12/00
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>anyone know how to increment std_logic_vectors

Use the unsigned package from Synopsys.
package STD_LOGIC_UNSIGNED is

function "+"(L: STD_LOGIC_VECTOR; R: STD_LOGIC_VECTOR) return
STD_LOGIC_VECTOR;
function "+"(L: STD_LOGIC_VECTOR; R: INTEGER) return STD_LOGIC_VECTOR;
function "+"(L: INTEGER; R: STD_LOGIC_VECTOR) return STD_LOGIC_VECTOR;
function "+"(L: STD_LOGIC_VECTOR; R: STD_LOGIC) return STD_LOGIC_VECTOR;
function "+"(L: STD_LOGIC; R: STD_LOGIC_VECTOR) return STD_LOGIC_VECTOR;

------------------------------------------------------
VhdlCohen Training, Consulting, Verification
Ben Cohen vhdl...@aol.com (310) 721-4830
http://www.vhdlcohen.com/
Author of following textbooks:
VHDL Coding Styles and Methodologies, 2nd Edition,
isbn 0-7923-8474-1 Kluwer Academic Publishers, 1999
VHDL Answers to Frequently Asked Questions, 2nd Edition,
isbn 0-7923-8115-7 Kluwer Academic Publishers, 1998
------------------------------------------------------


David Bishop

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May 13, 2000, 3:00:00 AM5/13/00
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rattle wrote:
>
> anyone know how to increment std_logic_vectors

With:

use ieee.numeric_std.all;

You can:

newsig <= std_logic_vector ( unsigned ( oldsig ) + 1 );

The problem is that you don't know if a "std_logic_vector" is
signed or unsigned.

David Bishop (dbi...@vhdl.org)

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