Next, does anybody know of a tags file generator for the VHDL
language? (Tags is a kind of cross-referencing file that some
editors can use to let you jump around in code). If you know
of one available by anonymous ftp, just post the site name.
Other tips for VHDL browsing, cross-referencing, and other kinds
of static analysis appreciated.
Last, I saw some VHDL code written by an engineer here go by my
desk this morning, and it looked awful. No indenting, variable
names and keywords in all-caps, no comments, no whitespace (anywhere!).
I know that VHDL can be written to look better than this looked.
Rather than simply try to push my inexperienced notions of "good"
onto folks, are there any VHDL coding guidelines or standards floating
around? Again, pointers to anonymous ftp sites are nice; a copy
of the world-class coding style standards that YOU use also welcome!
Thanks in advance...
...nziring
--
...nz (Neal Ziring @ Aztech, nzi...@aztech.ba.md.us)
If you want it done bad, this is the place...