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Q regarding SDF format

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tre...@vlsi.concordia.ca

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Apr 14, 1995, 3:00:00 AM4/14/95
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Hi
I have a question regarding SDF file generated using Synopsys.
I have synthesis a adder [ 1 bit] using LSI's lca300k lib. I generated SDF
file from synopsys. When I created SDF from LSI for the same design. all
the parameters for Voltage, temp and process were different.( all the files
are included in last)

Q: How can you read the information for Voltge, Temp and Process into
Synopsys. B'cause for LSI you can mention this info in a file called
"pvt_in" with all best:normal:worst cases.

Q: There format is also a bit different so, Synopsys does't read file
generated by LSI.


These are the files mentioned above:

1) adder.v
*************************************************************************
module adder(in1,in2,ca,sum);
output ca,sum;
input in1,in2;
and (ca,in1,in2);
xor (sum,in1,in2);
endmodule

/*
module test_fixture;
reg i1,i2;
reg dummy;
adder u1 (i1,i2,ca_out,sum_out);
initial begin
$lsi_delaycal(,"LCA100K","L100006P","2-metal","cmde");//** to get SDF **

dummy = 0;
i1 = 0;
i2 = 0;
#10 i2 = 1;
#15 i1 =1; i2 = 1;
#20 i2 = 0;
#20 dummy =1;
#20 $stop;
#20 $finish;
end

initial
//
// ASCII SIMULATION OUTPUT
//
// $monitor($time,"i1 = %b i2 = %b ca_out = %b sum_out = %b",i1,i2,ca_out,sum_out);
//
// WINDOW SIMULATION OUTPUT
//
$gr_waves("i1",i1,"i2",i2,"ca_out",ca_out,"sum_out",sum_out,"dummy",dummy);
endmodule

*/

*************************************************************************


2) SDF generated using Synopsys
*********************************************************

(DELAYFILE
(SDFVERSION)
(DESIGN "adder")
(DATE "Fri Mar 3 18:13:35 1995")
(VENDOR "lca300kv")
(PROGRAM "Synopsys Design Compiler cmos")
(VERSION "v3.1a")
(DIVIDER /)
(VOLTAGE 5.00:5.00:5.00)
(PROCESS)
(TEMPERATURE 25.00:25.00:25.00)
(TIMESCALE 1ns)
(CELL
(CELLTYPE "adder")
(INSTANCE)
(DELAY
(ABSOLUTE
(INTERCONNECT in1 U4/A (0.000:0.000:0.000))
(INTERCONNECT in2 U4/B (0.000:0.000:0.000))
(INTERCONNECT in1 U3/A (0.000:0.000:0.000))
(INTERCONNECT in2 U3/B (0.000:0.000:0.000))
)
)
)
(CELL
(CELLTYPE "EO")
(INSTANCE U4)
(DELAY
(ABSOLUTE
(IOPATH A Z (0.400:0.400:0.400) (0.410:0.410:0.410))
(IOPATH B Z (0.200:0.200:0.200) (0.210:0.210:0.210))
)
)
)
(CELL
(CELLTYPE "AN2")
(INSTANCE U3)
(DELAY
(ABSOLUTE
(IOPATH A Z (0.230:0.230:0.230) (0.220:0.220:0.220))
(IOPATH B Z (0.230:0.230:0.230) (0.220:0.220:0.220))
)
)
)
)

*************************************************************************

3) SDF generated using LSI's $lsi_delaycal
*************************************************************************

(DELAYFILE
(SDFVERSION "sdf interface 1.1d")
(DESIGN "test_fixture")
(DATE "Mon Apr 3 14:06:59 1995")
(VENDOR "LSI_LOGIC")
(PROGRAM "VGDK DELAY_CALC")
(VERSION "2.0a")
(DIVIDER .)
(VOLTAGE ::4.75)
(PROCESS "::1.50")
(TEMPERATURE ::70.00)
(TIMESCALE 1ns)
(CELL
(CELLTYPE "AN2")
(INSTANCE test_fixture.u1.U3)
(DELAY
(ABSOLUTE
(IOPATH A Z (::0.71) (::0.69) )
(IOPATH B Z (::0.71) (::0.69) )
(PORT A (::0.00) (::0.00))
(PORT B (::0.00) (::0.00))
)
)
)
(CELL
(CELLTYPE "EO")
(INSTANCE test_fixture.u1.U4)
(DELAY
(ABSOLUTE
(IOPATH A Z (::1.08) (::1.16) )
(IOPATH B Z (::0.69) (::0.78) )
(PORT A (::0.00) (::0.00))
(PORT B (::0.00) (::0.00))
)
)
)
)
*************************************************************************

Hoping to hear from you soon.
Thanks in advance

Trehan, Pervinder
|--------------------------------------|-----------------------------|
| Department Address | Residential Address |
|--------------------------------------|-----------------------------|
|Dept. of Electrical and Computer Engg.| 6540, Poitou st. Brossard |
|Concordia University | Montreal, Quebec, |
|1455 de Maisonneuve Blvd (West) | Canada J4W 2T3. |
|Montreal, Quebec, Canada H3G 1M8. | Tel: (514)672-0018 |
|Telephone no. (514) 848-7655(message).| |
|Fax no. (514) 848-2802. | |
|email: tre...@vlsi.concordia.ca | |
|--------------------------------------|-----------------------------|


Keywords:


reb...@laas.fr

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Apr 26, 1995, 3:00:00 AM4/26/95
to

Hello,

I've got a problem with passing parameters when they are files. For example, I
would like to write :


Entity ... is
port (name_of_file : in string;
........);
end ...;

Architecture ... of ... is
begin
process
begin
file fichier : TEXT is in name_of_file;
.
.
.
end process;
end ...;

And in a file for simulation

name_of_file<="toto.vcl";


This seems not to be possible. But could you tell me how to do ?

Thanks in advance

Vanessa REBOUL
LAAS-CNRS
31077 TOULOUSE
FRANCE


e-mail : reb...@laas.fr

Ashutosh Singla

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Apr 27, 1995, 3:00:00 AM4/27/95
to
In article <3nlmil$b...@news.cict.fr>, reb...@laas.fr () writes:
> I've got a problem with passing parameters when they are files. For example, I
> would like to write :
>
>
> Entity ... is
> port (name_of_file : in string;
> ........);
> end ...;
>
> Architecture ... of ... is
> begin
> process
> begin
> file fichier : TEXT is in name_of_file;
> .
> .
> .
> end process;
> end ...;
>
> And in a file for simulation
>
> name_of_file<="toto.vcl";

Try the following. It may work.
architecture ... of .. is
procedure to_open_file(name : in string) is
file fichier : text is in name_of_file;
begin
end to_open_file;
begin
process
begin
wait on name_of_file;
to_open_file(name_of_file);


.
.
.
end process;

end ......

Please modfiy your entity as well as string has to be constrained, otherwise
you may have to use access type.

Ashutosh


Stephen A. Bailey

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Apr 28, 1995, 3:00:00 AM4/28/95
to
In article <3np2bv$s...@redwood.cs.scarolina.edu>, sin...@liz.ece.scarolina.edu says...

Signals cannot be access-typed. Constraining the string type for
the signal is your only choice in this context (for '87). In '93
you can use a shared variable combined with a "tickle" signal.

>Ashutosh
>

--
=========================================================
Stephen A. Bailey voice: 408.377.8326
SRBailey fax: 408.377.1206
911-C Apricot Avenue data: 408.377.1206
Campbell, CA 95008
http: TBA email: ste...@srbailey.com
=========================================================


Andrew Hana

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Apr 28, 1995, 3:00:00 AM4/28/95
to
reb...@laas.fr wrote:

: Hello,

: I've got a problem with passing parameters when they are files. For example, I
: would like to write :


: Entity ... is
: port (name_of_file : in string;
: ........);
: end ...;

: Architecture ... of ... is
: begin
: process
: begin
: file fichier : TEXT is in name_of_file;

The "file" declaration has to be in the declarative region of the process.
That is, you need:


Architecture ... of ... is
begin
process

file fichier : TEXT is in name_of_file;

begin

end process

Even then, I imagine you might have trouble because the file pointer is created
at elaboration time. The file is opened once and once only during the life-time
of the simulation - at elaboration time.
Hence, the value of the port must be known at elaboration. Unless the driver
of the port (ie the signal that connects to "name_of_file" in the instantiation
of the above entity) is given a default value, then I would suspect that an
elaboration failure would occur.
If it is your intention to change the value of "name_of_file" during the course
of the simulation with the idea of opening a new file for reading, then again this
will fail because the file pointer is created once, and once only, at elaboration time.
I think you have two options:
1) Use GENERICS to pass the name of the file to be processed. GENERICS are
constants which are known at elaboration time.
2) Use a function/procedure to open the file for reading.
Once the function/procedure terminates, so the file-pointer associated with
the file is destroyed, and a new file pointer can be created when the
function/procedure is re-invoked.
I hope this helps
Andrew Hana

library usual;
use usual.disclaimers.all;


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