For now I've converted some of the important variables into signals, which I
can track in modelsim. For some reasons I can't track the variables, even
though Modelsim do have a 'view->variables'. Is that because it's inside a
process, and thus 'invisible' to modelsim? If so, why this 'limitation'?
--
I doubt, therefore I might be.
Variables can be viewed in ModelSim too. You just have to get
down through the hierarchy in the variable window.
--
Keith
It helps if you have the process window open. Click in the structure
window to get to the right architecture, then click in the process
window to select the right process and the variables window will
display the variables in that process. You can then drag them into
the waveform viewer.
Allan.
or in the tcl window for scripting:
add wave <path-to-rtl-code>/<named-process>/<variable>
(* work fine, IIRC)
Regards,
Kai
You have to click on the component that you interested in. Open the
process and variable windows. Select the process that contains the
variables via the process window.
Paul
> You have to click on the component that you interested in. Open the
> process and variable windows. Select the process that contains the
> variables via the process window.
Done that been there. It doesn't matter what component I click on (with
variables of course) - nothing in the variables view. Strangest thing.
An unrelated question, is there, hardware wise, a difference between a
variable and a signal? Ie. does it take up less space etc. or is the purpose
of a variable only that it exists in a process, and not outside?
No. If the code is written to infer a flip-flop, you'll get a flip-flop
regardless of whether it is a variable or signal.
I try to use variables wherever possible for signals used only within a
process because it makes the code clearer (you _know_ the signal isn't
used anywhere else) and because variables simulate faster. Naming
conventions can deal with the first issue but I still prefer variables
because of the simulation speed.
I also use variables to create intermediate combinational signals within
a process. Sometimes these are necessary, such as when you want to use a
concatenation of signals in a case statement and sometimes it is for
clarity to avoid repeating a long or complex expression.
--
Tim Hubberstey, P.Eng. . . . . . Hardware/Software Consulting Engineer
Marmot Engineering . . . . . . . VHDL, ASICs, FPGAs, embedded systems
Vancouver, BC, Canada . . . . . . . . . . . http://www.marmot-eng.com
> Variables can be viewed in ModelSim too. You just have to get
> down through the hierarchy in the variable window.
But the autogenerated testbench does not contain anything related to the
variables, and even though I manage to click the correct structure in
ModelSim, nothing shows up in the 'Variables' window.
It's very annoying to say atleast.
> I try to use variables wherever possible for signals used only within
> a process because it makes the code clearer (you _know_ the signal
> isn't
> used anywhere else) and because variables simulate faster. Naming
> conventions can deal with the first issue but I still prefer variables
> because of the simulation speed.
Sounds great (that about the simulation speed). Anyway- I've managed to
locate the variables, you first have to click on the relevant structure,
then click on the process in the process window then finally selecting the
variable.