Converting C/C++ to VHDL

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Dale How

Aug 23, 2001, 1:14:16 PM8/23/01

Is this at all possible and if it is so can anyone recommend which packages
do it well and where I can get them?


Alan Fitch

Aug 24, 2001, 4:59:52 AM8/24/01
In article <9m3di8$jcn$>, Dale How
<> writes

It is possible, but it depends on how you've written the code. There are
some tools which take in plain C (not C++); see

Adalante (formerly Frontier Design)

C-Level Design

There's a tool which uses a variant of C,

Handel-C - see

There's the SystemC class library, see There's a whole set
of links to tools on this web-site, including

Synopsys Cocentric SystemC compiler.

There's also a number of other class libraries, e.g.

Cynlib from Cynapps


Ocapi/Soc++ from IMEC in Belgium

Some of these routes are more mature than others. Some are strictly C,
not C++. All of them will have restrictions on what you can write, and
the style of code that is allowed.

kind regards


P.S. I apologise if I've left any companies out, now's your chance to
follow up this post!

Alan Fitch
Church Hatch, 22 Market Place, Ringwood, Hampshire BH24 1AW, United Kingdom
Tel: +44 1425 471223 Email:
Fax: +44 1425 471573 Web:

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Aug 24, 2001, 9:32:21 AM8/24/01

Our design team is following the progress on that front closely, but untill
now you can't speak from a real c to vhdl translator. You must rather say
"translate a c likely language to vhdl." The currently translateble code is
very limited compared with the c-possebilities. The code must be written in
formal C, a derived subset of the c language. Can you come back in a few

C++ is not supported.

Kind regards
Johan Van Dyck
VLSI Design Engineer &
Design Technology Office
Philips Leuven (Belgium)
"Dale How" <> schreef in bericht

Cor Schepens

Aug 24, 2001, 11:43:22 AM8/24/01

Like Alan said: IT IS POSSIBLE and designers are using it
successfully. Of course, you can't throw any type of C/C++ code in
such a tool and expect to get an optimal VHDL architecture. You will
have to use a certain coding style and it will only accept a certain
subset of C and C++. But it is not restricted to "What You Write Is
What You Get". You have also the possibility to let such a tool "map"
your code to your application-specific DSP architecture. Eg, that all
your multiplication instantiations (let's say 20) in your C-code will
be mapped to the available multipliers (let's say 1 or 2) within this

THE GOOD THING is that you are now able to work in a TOP-DOWN
APPROACH, taking C-code on a behavioral level and convert it RTL VHDL.
If you want to improve the results, you can try to use more (or less)
resources or make an incremental change to your C-code. Such an
incremental code change can easily be debugged when you made a
mistake, because you know, which lines you have changed. So, debugging
becomes a lot faster. You will make less bugs and will find them
easier and faster (fast C-simulation).
The traditional BOTTOM-UP APPROACH (staring at C-code and trying to
come up with an architecture that can implement it, followed by
hand-coding VHDL) is a manual and slow process. Once your VHDL is in a
stage that you can start debugging and you find a mistake, this
mistake might be anywhere in your VHDL code.

If you have a serious application of which parts are already described
in C/C++, I would take a serious look at what is available on the
market, today.

regards, Cor

Alan Fitch <> wrote in message news:<>...

Andy Peters <andy [@] exponentmedia

Aug 24, 2001, 12:06:51 PM8/24/01
Seems to me the whole notion of converting C or C++ to VHDL is born out
of sheer laziness. "Well, the software guys have already developed this
code. Let's burn it into an FPGA or an ASIC and make it run faster."

If you understand the problem well enough, you oughta be able to express
it properly in either language. For hardware description, you're still
better off with an HDL.

If you insist on using C, I'm willing to bet that the subset of C you'll
use for synthesizable modules will be quite restricted, and won't
compile and run natively on your Linux box.

Perhaps you can convince Stallman and the rest of the gnu persons to add
-target=virtex to gcc.

Note that experienced HDL persons already understand about writing
synthesizable code. But at least we can simulate our designs with the
same language using the non-synthesizable stuff, albeit in a particular
"environment" [the simulator's].

If you don't understand the problem well enough, blindly trusting a tool
to do the translation for you will bite you in the ass when you're in
debug, trying to figure out why the thing's not working. That's
language-independent, of course. (I don't blindly trust my HDL
synthesis tools, or the P+R tools.)


Ian Smith

Aug 28, 2001, 6:25:21 AM8/28/01
The only decent tool demo I have seen is:

Handel-C - see

We are currently trying it out for ourselves, but it seems helpful for
taking more complicated math functions and control state machines in C to

They have an extensive set of libraries for FPGA.


Sep 3, 2001, 4:55:03 AM9/3/01
I used Handel-C to make image filter for a short time.
i think that handel-C is simple and easy for C/C++ programer and System
engineer but it's not good for synthersis(lower performance about size and
operating frequency).
and...Handel-C is similar in grammar to ANSI C. but different
user cannot automatically generate C/C++ to Handel-C.

"Ian Smith" <> wrote in message

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