Numerically-Controlled Crystal Oscillator (NCXO) or Digitally-Controlled Crystal Oscillator (DCXO) Designs
Nestor
Does anyone know any manufacturer who fabricates
numerically-controlled crystal oscillators (NCXO), also known as
digitally-controlled crystal oscillators (DCXO) which are suitable for
digital phase-locked loop designs in VHDL and FPGAs?
Although these blocks resemble a numerically-controlled oscillator
(NCO), they differ in that the NCXO is not oversampled to generate the
required output signal (an NCO needs to be oversampled by at least
8-times in order to have an acceptable low jitter output). Rather, a
digital input word is fed to the NCXO and it synthesizes the required
output frequency using a standard, low-cost crystal oscillator. The
output is also a square wave, just like the standard crystal. In
general, the NCXO has a narrow tuning range similar to a
voltage-controlled crystal oscillator (VCXO), e.g. +/-150ppm relative
to a frequency in the MHz range.
The NCXO technology is fairly recent from what I understand, but
allows one to replace a circuit composed of a digital-to-analog
converter (DAC) and a VCXO by one chip that performs the exact same
task will less design hassles. The DCXO is ideal for custom-made
phase-locked loop (PLL) circuits using digital sections that can be
implemented in VHDL and FPGAs.
Since I haven't been able to find any NCXO manufacturers over the web,
I am now looking to the knowledgeable engineers, designers and friends
that frequent these newsgroups for some potential referrals and/or
links.
Thanks in advance for your help.
Nestor
Theron Hicks
for programmable master clocks (M115 series). I heard that that part was
being dropped so it may not be available but it sounds like just what you
wanted. Note that the output levels were PECLl (Positive ECL) but there
are level translators available quite cheaply. The M115 was a full blown
oscillator and the last time I used one it went for about $175. Frequency
range was 100MHz to 1000MHz depending on model number.
Rolie Baldock
require?
--Rolie Baldock. email: <berd_kalamunda@'nospam'techemail.com>
rickman
oscillator with a variactor diode to control the frequency. All crystal
circuits can be tuned slightly by varying the capacitance in the
circuit. The variactor diode allows you to use a DC voltage to adjust
this capacitance.
I am not familiar with the NCXO or DCXO, but I would be willing to bet
that this is just a DAC combined with a VCXO. No magic here, just a
matter of combining mulitple devices in one package.
--
Rick Collins
rick.c...@XYarius.com
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ko...@prowokulta.org
Theron Hicks <hick...@egr.msu.edu> wrote:
> Look at
ICS has a couple of clock synthesizers.
The easiest to use is the ICS525
You connect a crystal and apply multiplier and divisor on 17 input pins.
The chip will do up to 160MHz.
I got a low quantity quote from scantec of $3 a piece.
CU,
Kolja
> http://www.micronetworks.com/
>
> for programmable master clocks (M115 series). I heard that that part
was
> being dropped so it may not be available but it sounds like just what
you
> wanted. Note that the output levels were PECLl (Positive ECL) but
there
> are level translators available quite cheaply. The M115 was a full
blown
> oscillator and the last time I used one it went for about $175.
Frequency
> range was 100MHz to 1000MHz depending on model number.
Sent via Deja.com http://www.deja.com/
Before you buy.
Austin Lesea
A DDFS (direct digital frequency synthesizer) is an adder/accumulator.
They have been around for perhaps 30 years now. I have used them for
years in FPGAs. The sine look up table is only used if you want a sine
wave. I have seen people use a sine look up table, a D/A, and then follow
that mess with a comparator -- TO GET A SQUARE WAVE! Think about it. The
MSB of the DDFS was already the signal they wanted!
So, if you don't want a sine wave, don't add all that junk.
The p-p jitter is the clock period used, and the Fout < 1/2 Fclock.
I would use the highest frequency I could get away with. If you require
even less jitter, the output can be passed through a single simple VCXO
used in a PLL loop with an XOR phase detector and an external RC to remove
practically all of the jitter if the frequency output range is narrow
enough.
Placing the DDFS in a locked loop, results in a complete digital locked
loop (Patented -- look it up, under my name).
There are many nice parts out there that package the whole thing, and are
inexpensive, so you need to evaluate what it is going to be used for, and
decide if you want to build it in, or not.
Also look at:
http://www.xilinx.com/xcell/xl31/xl31_32.pdf
for fractional synthesis,and other NCO's.
Austin Lesea
rickman
lot of jitter, then you do need the sine wave which can be filtered to
produce a wave of just the fundamental. This is then compared to a fixed
voltage to produce a square wave with no jitter.
If you don't do this, you will have a time jitter equal to your master
clock period as you noted. This is often not acceptable and the sine
wave lookup, DAC and filter can be less circuitry than the VCXO, phase
comparator and filter. In fact you can get the whole shebang in one chip
less the filter.
--
Austin Lesea
A bandpass filter with high Q is what is needed. The PLL with VCXO has a Q of
millions. A good tank circuit works also, but less well (Q ~100).
Guess what happens when you put the square wave MSB) into the same band pass
filter? Pop: out comes the fundamental (for less money).
I always get a kick out of all of those expensive sine wave lookups tables and
A/D's doing nothing.
If a low Q filter is used, there is some tiny improvement in the lookup table
conversion method due to the sideband power not adding to the overall phase
noise.
Don't take my word for it, use a good spectrum analyzer to analyze the sidebands
at each point in the circuit. Take out the D/A and see what changes. It
usually makes the jitter less because of D/A noise issues, reference nosie
issues, and comparator noise issues.
"The common wisdom is neither common, nor wise." anon.
Austin
eddy_...@my-deja.com
As someboby said, you might better to define freq value needed.
From my experience, I used SY82429 PECL PLL device which is
programable in 7(6?)bits M/N style resolution that covers 100MHz?
to 400MHz when driven by 16MHz external Xtal.
I used them with Actel FPGA 4yrs ago. (SY** is Synergy's product.)
As the device being PECL, it heats Xtal package up and the output
freq drifts a lot.
If compensation required, you might have to have trivial control
loop for the external Xtal with Vari-Cap and OpAmp, which means...
(--;) a lots of additional analog circuits.
So, you might better to define jitters, drifts, IO signal levels,
and so on.
eddy_...@my-deja.com
If you can read japanese char/font on your pc,
try to visit a japanese company
http://www.tk1.speed.co.jp/tamadevice/sangyou-osc.htm
They sell TCXO,VCXO,OCXO for 5ppm/2.5ppm/1.5ppm
Regards (^^;
rickman
the frequency of the signal, you use a low pass filter below the Nyquist
rate at the DAC. The goal is not to try to remove the 'jitter' noise
that was added by the fixed sample clock, but rather to eliminate the
aliased spectrum above the Nyquist rate.
The end result is that you can use the same circuit for multiple
frequencies and normally have a simpler and smaller filter.
So I can't say what would happen if you passed the MSB through the same
filter as it may do relatively little to remove the 'jitter'. But even
if you use the more complex bandpass filter and are left with the
fundamental, wouldn't that be a sine wave which will require a
comparator to shape it back into a low jitter square wave putting back
some of the noise you are referring to?
doug
to have a fixed frequency and that frequency needs to be in a special
relationship with the clock. If you are near a binary divisor of the clock
frequency, the jitter will produce sidebands too near the carrier to be
removed by any filter that makes reasonable sense. The D/A makes
a tuneable filter and it works well.
I did extensive computer simulations of this when I made all digital plls
nearly 20 years ago (probably long predating any patents on the obvious
idea) and found that with a careful choice of frequency, the spurs could
be avoided in some small range. However, making a broad range source
did not justify the effort to try to skip the D/A. Sine lookup table are
not
necessary.
Companies like Analog Devices have made the discussion moot with their
line of cheap and versatile DDCs. They work very well and are easy to use
and do not require much in the way of external parts.
"Austin Lesea" <austin...@xilinx.com> wrote in message
news:39BD6DE1...@xilinx.com...
Austin Lesea
I stand corrected.
If a sine wave lookup table is used, and a D/A with a sufficient number of bits,
followed by a low pass filter, all jitter can be removed. The advantages of
such an arrangement is the ability to synthesize any frequency from near 0 Hz up
to <1/2 the clock in, and not require different filters, and use a low pass
filter, rather than a band pass filter.
The low pass filter may be quite simple if the Fout << Fclock. For information
on phase noise/jitter in relation to number of bits of resolution, please see
the Analog Devices web site, and search on jitter or phase noise. They have
some good papers and formulas for such things.
My comment on D/A noise, filter noise, and comparator noise still stands, and
systems using the lookup table method need to pay special attention to other
sources of phase noise that will cause jitter.
Systems which operate over a narrow(er) range of frequencies can benefit from a
simpler arrangement, and remove all jitter without risking adding it back in.
I appreciate the personal emails to me which helped me realize I might have
misled some people out there,
Thank you,
Austin
Nestor
12MHz-40MHz range, but the resolution of the digital input control has not
been determined yet. I don't think I will need more than 8 bits though.
Rolie Baldock <berd_ka...@techemail.com> wrote in message
news:39b96e51...@news.m.iinet.net.au...
> What frequency range are you interested in and what resolution do you
> require?
>
Nestor
using a combination of a DAC and a VCXO might not adapt fast enough to the
input control change. However, my purpose is to actually find a circuit
that could emulate the DAC/VCXO idea so that the frequency is controlled
digitally.
I have seen a VLSI design making use of the Pierce topology to create a DCXO
using an external crystal oscillator (12MHz-30MHz) for the reference
frequency. The DCXO has a digital control, but from the figure I have it is
not clear how the digital section interfaces with the oscillator section (it
has been omitted from the figure). It's possible an internal DAC is
included.
Nestor
rickman <spamgo...@yahoo.com> wrote in message
news:39B9CA44...@yahoo.com...
> I believe the VCXO circuit you are describing is a standard crystal
> oscillator with a variactor diode to control the frequency. All crystal
> circuits can be tuned slightly by varying the capacitance in the
> circuit. The variactor diode allows you to use a DC voltage to adjust
> this capacitance.
>
> I am not familiar with the NCXO or DCXO, but I would be willing to bet
> that this is just a DAC combined with a VCXO. No magic here, just a
> matter of combining mulitple devices in one package.
>
rickman
technology. I am pretty sure you can only bend a VCXO by about 200 ppm
or so. What you need is called an NCO, numerically controlled
oscillator. This is a clocked adder followed by a sine lookup table and
a DAC. The analog signal then looks like a stepped sine wave. A filter
changes this to a pure sine wave which is then squared up with a
comparator.
At 30 MHz this will work well and can be found in a single chip less the
filter. Try Analog Devices. This is also called Direct Digital Frequency
Synthesis, DDFS or just DDS. There have been several messages in this
thread about this already.
You will need a much faster clock to run this, the minimum will be 2x
your max rate. I sugest you try 100 MHz for better results and better
and simpler filtering.
--
Rick Collins
rick.c...@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.
Arius - A Signal Processing Solutions Company
Austin Lesea
Good points re: filters. That is why I used the crystal based filter.
As for the patent, it still provides revenues for the company I worked for from
licensing fees. It was even challenged by another company. I remember hearing
about the engineer at that company who cursed me up and down the halls....he was
too lazy to have documented the "invention" in his notebook or else he could
have shown prior art, and been free to use it, and saved his company a ton of
money. "Obvious" has a legal meaning.
Ever see that nose strip that holds your nostrils open while you exercise? The
patent on that is quite valid, and makes someone a whole lot of money.
Austin