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how create an 8 bit binary to BCD decoder?

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Christian

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May 15, 2002, 4:06:47 PM5/15/02
to
Hello!
I know this newsgroup is specially ybout VHDL. But I am curently working
with Altera's derivation AHDL.
My question isn't quite language related but more general:

How would you create a decoder which generates BCD-coding from normal 8bit
binary coding?
I want to control several 7 segment displays and therefore have to use BCD
coding.

I'd be very happy to get any kind of help.
Regards
Chris.

sweir

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May 15, 2002, 4:57:57 PM5/15/02
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Do you have to do it in parallel, or can you run a state machine? It is
essentially a division problem. A state machine based divider will save you
a lot of gates.

Regards,
"Christian" <Christia...@t-online.de> wrote in message
news:abuf2p$jm4$03$1...@news.t-online.com...

Richard Geissler

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May 16, 2002, 4:55:44 AM5/16/02
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Hello Christian,

a serial working binary to BCD decoder you can find there:

http://mikro.e-technik.uni-ulm.de/vhdl/vhdl_models.html

Regards,
Richard

Keith R. Williams

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May 16, 2002, 11:10:51 PM5/16/02
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In article <abuf2p$jm4$03$1...@news.t-online.com>,
Christia...@t-online.de says...

> Hello!
> I know this newsgroup is specially ybout VHDL. But I am curently working
> with Altera's derivation AHDL.
> My question isn't quite language related but more general:
>
> How would you create a decoder which generates BCD-coding from normal 8bit
> binary coding?
> I want to control several 7 segment displays and therefore have to use BCD
> coding.

Why not a seven-segment counter? It's your FPGA, go fer it! ;-)

Others pointed you to some converters. You might also look at the
old 74xx stuff. There were cascadable binary to BCD and BCD to
seven-segment decoders in there.

I don't know AHDL, but I toyed with a VHDL version at work today
(interesting problem). I may still have it if you want (my
outbound Inet connection was barfing).

----
Keith

Barry Roper

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May 17, 2002, 11:32:26 AM5/17/02
to
Hi Chris,
I tried out the code below and it synthesised to approx 90
combinational
gates on an Asic Library using Synopsys -- but I guess it depends
upon the resources in your target device.

Cheers ,

Barry


library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;

entity BIN2BCD is
port (
BINARY : in std_logic_vector(7 downto 0); -- range 0 to 255
BCD : out std_logic_vector(9 downto 0)
);
end BIN2BCD;

architecture COMB of BIN2BCD is

signal BIN2INT : integer range 0 to 255;
signal HUNDREDS : integer range 0 to 2;
signal TENS : integer range 0 to 9;
signal UNIT_S : integer range 0 to 9;
-- Can't use name UNITS because it's areserved word

begin
-- concurrent assignments
BIN2INT <= CONV_INTEGER(UNSIGNED(BINARY(7 downto 0))); -- convert to
integer
BCD <= CONV_STD_LOGIC_VECTOR(HUNDREDS,2) &
CONV_STD_LOGIC_VECTOR(TENS,4)
& CONV_STD_LOGIC_VECTOR(UNIT_S,4); -- concatenate the output

-- combinational process using variables
CONVERSION : process (BIN2INT)
variable REM99_VAR : integer range 0 to 99; -- remainder after
hundreds
variable HUN_VAR : integer range 0 to 2;
variable TEN_VAR : integer range 0 to 9;
variable UNIT_VAR : integer range 0 to 9;

begin

if BIN2INT > 199 then
HUN_VAR := 2;
elsif BIN2INT > 99 then
HUN_VAR := 1;
else
HUN_VAR := 0;
end if;

REM99_VAR := BIN2INT - (HUN_VAR * 100);

if REM99_VAR > 89 then
TEN_VAR := 9;
elsif REM99_VAR > 79 then
TEN_VAR := 8;
elsif REM99_VAR > 69 then
TEN_VAR := 7;
elsif REM99_VAR > 59 then
TEN_VAR := 6;
elsif REM99_VAR > 49 then
TEN_VAR := 5;
elsif REM99_VAR > 39 then
TEN_VAR := 4;
elsif REM99_VAR > 29 then
TEN_VAR := 3;
elsif REM99_VAR > 19 then
TEN_VAR := 2;
elsif REM99_VAR > 9 then
TEN_VAR := 1;
else
TEN_VAR := 0;
end if;

UNIT_VAR := REM99_VAR - (TEN_VAR * 10);

-- assign variables to signals
HUNDREDS <= HUN_VAR;
TENS <= TEN_VAR;
UNIT_S <= UNIT_VAR;

end process CONVERSION;
end COMB;


"Christian" <Christia...@t-online.de> wrote in message news:<abuf2p$jm4$03$1...@news.t-online.com>...

emirog...@gmail.com

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May 1, 2014, 12:55:09 PM5/1/14
to
15 Mayıs 2002 Çarşamba 23:07:03 UTC+3 tarihinde Christian yazdı:

rickman

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May 9, 2014, 2:33:46 PM5/9/14
to
I see this message has not been answered so let me try.

I remember seeing some fairly elegant ways to convert binary to decimal,
but none of them seem to have stuck in my mind. I bet a google search
would pull up a few.

In your case I think you could do some fairly simple shortcuts which
take advantage of the fact that you are only converting an 8 bit sample.
With larger numbers it is usually done iteratively, converting one
digit at a time, LSB first.

--

Rick

GaborSzakacs

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May 12, 2014, 8:40:08 AM5/12/14
to
When I had to do this with an 8-bit micro, I made use of the DAA
(decimal adjust after addition) instruction. The basic loop was:

shift input left into carry
add accumulator + carry in to accumulator
decimal adjust accumulator

The combination of addition and DAA effectively created a BCD
adder.

Note that the accumulator must be zeroed out before the loop,
and you need a loop counter, but that was the basic idea.

In an FPGA, I'd probably use a lookup table if there were only 8 bits.
I assume that since this information is going to a display, that you
have lots of time (many clock cycles) available to get the job done?

--
Gabor
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