Reading Hex values (strings) from a text file

[Richard Francis]

Hi,

I want a test bench to read in hex string values from a text file using
VHDL'93 and the TEXTIO package. Ultimately, the number will become a
std_logic_vector.

Can anyone recommend the best method for doing this please? How can I
convert the string to the std_logic_vector?

Many thanks,

Richard Francis

[Mike Treseler]

Richard Francis wrote:
> Hi,
>
> I want a test bench to read in hex string values from a text file using
> VHDL'93 and the TEXTIO package. Ultimately, the number will become a
> std_logic_vector.
>
> Can anyone recommend the best method for doing this please? How can I
> convert the string to the std_logic_vector?
>

Consider a constant array of vectors:

See google groups: vhdl array_o_vector

-- Mike Treseler

[Alan Fitch]

"Richard Francis" <richard...@uk.thalesgroup.com> wrote
in message news:b6esui$72v$1...@rdel.co.uk...

You can use the Synopsys STD_LOGIC_TEXTIO package, in the
IEEE library.
This provides procedures to read and write in Hex. Note
you'll need
both STD.TEXTIO and IEEE.STD_LOGIC_TEXTIO together.

regards

Alan
--
Alan Fitch
HDL Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * Perl * Tcl/Tk * Verification *
Project Services

Doulos Ltd. Church Hatch, 22 Market Place, Ringwood,
Hampshire, BH24 1AW, UK
Tel: +44 (0)1425 471223 mail:
alan....@doulos.com
Fax: +44 (0)1425 471573 Web:
http://www.doulos.com

The contents of this message may contain personal views
which are not the
views of Doulos Ltd., unless specifically stated.

[Srinivasan Venkataramanan]

Hi Richard,
Use the procedure HREAD defined in IEEE.STD_LGIC_TEXTIO
package, this package is NOT an official IEEE one, but most of the EDA
Vendors tend to support this (originally from Synopsys). I am wondering when
would the IEEE committee formally approve this package/its clone.

HTH,
Srinivasan

"Richard Francis" <richard...@uk.thalesgroup.com> wrote in message
news:b6esui$72v$1...@rdel.co.uk...

> --
Srinivasan Venkataramanan
Senior Verification Engineer
Software & Silicon Systems India Pvt Ltd. - an Intel company
Bangalore, India

http://www.noveldv.com http://www.deeps.org

I don't speak for Intel

[jakab tanko]

Hi,

This is what I used to read data from a file to VHDL testbench,
---
jakab
--////////////////////////////////////////
read_vector: process(PCI_LCLK)
variable open_status : file_open_status;
variable l1 : line; -- pointer to a string
variable temp1,temp2,temp3,temp4 : integer;
-- read input vectors
begin
if (PCI_LCLK'event and PCI_LCLK = '1') then
if (rd_vec='1') then -- read data only once from file
file_open(open_status, xy_in_file, "564test_in.dat", read_mode);
for index in 1 to test_length loop

readline(xy_in_file, l1);
read(l1,temp1);
input_vector1(index) <= conv_std_logic_vector(temp1,16);

readline(xy_in_file, l1);
read(l1,temp2);
input_vector2(index) <= conv_std_logic_vector(temp2,16);

readline(xy_in_file, l1);
read(l1,temp3);
input_vector3(index) <= conv_std_logic_vector(temp3,16);

readline(xy_in_file, l1);
read(l1,temp4);
input_vector4(index) <= conv_std_logic_vector(temp4,16);

-- assert false report (LF &
-- " x(n): " & integer'image(index) & " " & integer'image(temp1) &
-- " " & integer'image(temp2)
-- ) severity Note;
end loop;
file_close(xy_in_file);
end if;
end if;
end process read_vector;
--///////////////////////////////////////

Richard Francis <richard...@uk.thalesgroup.com> wrote in message
news:b6esui$72v$1...@rdel.co.uk...

[VhdlCohen]

>> I want a test bench to read in hex string values from a text file using
>> VHDL'93 and the TEXTIO package. Ultimately, the number will become a
>> std_logic_vector.

Use stdtxtio.vhd Synopsys TextIO Package , also available at my site
--------------------------------------------------------------------------
Ben Cohen Publisher, Trainer, Consultant (310) 721-4830
http://www.vhdlcohen.com/ vhdl...@aol.com
Author of following textbooks:
* Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn
0-9705394-2-8
* Component Design by Example ", 2001 isbn 0-9705394-0-1
* VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1
* VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115
------------------------------------------------------------------------------