mod operation in VHDL

[Sharif M. Shahrier]

Can someone explain how the "mod" operation in VHDL works, i.e.
for both positive and negative numbers.
Z=A mod B, where A or B may be positive or negative.

Please send me e-mail reply.

--
Sharif M. Shahrier Tel: 1-609-951-2976
NEC USA Inc. Fax: 1-609-951-2499
4 Independence Way
Princeton, NJ 08540, U.S.A. E-mail: shah...@ccrl.nj.nec.com

[Peter Ashenden]

Sharif M. Shahrier wrote:
>
> Can someone explain how the "mod" operation in VHDL works, i.e.
> for both positive and negative numbers.
> Z=A mod B, where A or B may be positive or negative.

VHDL has two operators for getting the "left over" part after division.
They are "rem" (remainder) and "mod" (modulo). The following
explanation is excerpted from The Designer's Guide to VHDL (see my web
page for info):

The remainder operator is defined such that the relation

A = (A / B) * B + (A rem B)

is satisfied. The result of A rem B is the remainder left over from
division of A by B. It has the same sign as A and has absolute value
less than the absolute value of B. For example:

5 rem 3 = 2, (-5) rem 3 = -2, 5 rem (-3) = 2, (-5) rem (-3) = -2

Note that in these expressions, the parentheses are required by the
grammar of VHDL. The two operators, rem and negation, may not be
written side by side. The modulo operator conforms to the mathematical
definition satisfying the relation

A = B * N + (A mod B) -- for some integer N

The result of A mod B has the same sign as B and has absolute value less
than the absolute value of B. For example:

5 mod 3 = 2, (-5) mod 3 = 1, 5 mod (-3) = -1, (-5) mod (-3) = -2

Hope this answers your question.

Cheers,

PA
--
Peter J. Ashenden Email: pet...@ececs.uc.edu
Visiting Scholar, Dept ECECS peter.a...@acm.org
University of Cincinnati Phone: +1 513 556 4756
PO Box 210030 Fax: +1 513 556 7326
Cincinnati OH 45221-0030, USA

http://www.cs.adelaide.edu.au/~petera/
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