On 5/10/22 18:33, tushar sharma wrote:
> I am trying to make a cube computation circuit using Vedic Algorithms.
> The code is as follows:
[...]
> *********************
> There is no syntax error being reported, but the code is not simulating because of the components used in the if-else statement (Saw this method on stackoverflow)
> The two components cubeComputation8bit_Yes and cubeComputation8bit_NO are working correctly independently. But not when put together this way.
You can not use the "if <...> generate" with a signal. It doesn't make
any sense.
Your code doesn't make much sense either. It looks like you're using
VHDL as a programming language, which it is definitely not.
Nicolas