for index in 0 to 127 loop
for sample_sel in 0 to 7 loop
sample_val := integer(scale * sin(phase(sample_sel)));
write ( sample_line, sample_val, RIGHT, 10);
phase(sample_sel) := phase(sample_sel) + phase_inc(sample_sel);
end loop;
writeline ( ip_dat, sample_line );
end loop;
does what I want, but with decimal values.
If I change to:
hwrite ( sample_line, sample_val, RIGHT, 10);
or:
write ( sample_line, to_hstring(sample_val), RIGHT, 10);
it doesn't compile.
Any thoughts?
Thanks
Pete
Hi Peter,
which simulator do you use?
Probably the compile options are set to some old VHDL standard or you
are using wrong or outdated libraries for the functions you intend to
use.
Maybe this link is helpful too:
Have a nice simulation
Eilert
which textio-library are you using? if i remember correctly,
hread/hwrite can only be used with ieee.std_logic_textio.all;
hth
he
From my experiences from modelsim :
* hwrite works on std_logic_vector but requires the vector to be of
"even length", that is the length must be a multiple of 4.
* to_hstring doesn't work for std_logic_vector, you'll have to convert
it to a bit_vector first.
In your case I would try using
hwrite(sample_line, std_logic_vector(to_unsigned(sample_val, <length>)));
replace <length> with a valid length for your vector: 4,8,12,16... etc.
(remember to add : use ieee.numeric_std.all;)
Magne
why not create an integer to string function:
------------------------------------------------------------------------------------
--Returns the size of the given integer as if it were a string in
the given Radix
------------------------------------------------------------------------------------
function get_int_length(x : integer; radix : positive range 2 to
36 := 10) return integer is
variable temp : integer := abs x;
variable len : integer := 0;
begin
if x = 0 then
len := 1;
end if;
while temp > 0 loop
temp := temp / radix;
len := len + 1;
end loop;
if x < 0 then
len := len + 1; --add extra character for -ve sign
end if;
return len;
end function get_int_length;
----------------------------------------------
--Converts an integer to a string
----------------------------------------------
function int_to_string( x : integer; radix : positive range 2 to
36 := 10) return string is
constant STRING_LEN : integer := get_int_length(x, radix);
variable ret_string : string(1 to STRING_LEN);
--internal variables
variable temp : integer := abs x;
variable temp_rem : integer;
begin
--downto to make sure the string isnt the wrong way
round.
for i in STRING_LEN downto 1 loop
--add -ve sign
if i = 1 and x < 0 then
ret_string(i) := '-';
else
temp_rem := temp rem radix;
case temp_rem is
when 0 => ret_string(i) := '0';
when 1 => ret_string(i) := '1';
when 2 => ret_string(i) := '2';
when 3 => ret_string(i) := '3';
when 4 => ret_string(i) := '4';
when 5 => ret_string(i) := '5';
when 6 => ret_string(i) := '6';
when 7 => ret_string(i) := '7';
when 8 => ret_string(i) := '8';
when 9 => ret_string(i) := '9';
when 10 => ret_string(i) := 'A';
when 11 => ret_string(i) := 'B';
when 12 => ret_string(i) := 'C';
when 13 => ret_string(i) := 'D';
when 14 => ret_string(i) := 'E';
when 15 => ret_string(i) := 'F';
when 16 => ret_string(i) := 'G';
when 17 => ret_string(i) := 'H';
when 18 => ret_string(i) := 'I';
when 19 => ret_string(i) := 'J';
when 20 => ret_string(i) := 'K';
when 21 => ret_string(i) := 'L';
when 22 => ret_string(i) := 'M';
when 23 => ret_string(i) := 'N';
when 24 => ret_string(i) := 'O';
when 25 => ret_string(i) := 'P';
when 26 => ret_string(i) := 'Q';
when 27 => ret_string(i) := 'R';
when 28 => ret_string(i) := 'S';
when 29 => ret_string(i) := 'T';
when 30 => ret_string(i) := 'U';
when 31 => ret_string(i) := 'V';
when 32 => ret_string(i) := 'W';
when 33 => ret_string(i) := 'X';
when 34 => ret_string(i) := 'Y';
when 35 => ret_string(i) := 'Z';
--something has gone very wrong. Kill simulation
when others => report "Illegal option chosen in converting
integer to string" severity failure;
end case;
temp := temp / radix;
end if;
end loop;
return ret_string;
end function int_to_string;
> which simulator do you use?
Active-HDL 8.2
> Probably the compile options are set to some old VHDL standard or you
> are using wrong or outdated libraries for the functions you intend to
> use.
I'm compiling with -2008.
Thanks
Pete
> which textio-library are you using? if i remember correctly,
> hread/hwrite can only be used with ieee.std_logic_textio.all;
I'm using std.textio.all.
I'll give the other library a try, but sample_val is an integer,
so I didn't think I'd have to mess with std_logic stuff.
Thanks
Pete
> From my experiences from modelsim :
> * hwrite works on std_logic_vector but requires the vector to be of "even
> length", that is the length must be a multiple of 4.
> * to_hstring doesn't work for std_logic_vector, you'll have to convert it
> to a bit_vector first.
Probably my problem is that sample_val is an integer.
How to I print an integer as hex?
Thanks
Pete
> why not create an integer to string function:
[code supplied]
Thanks. I'll try that.
It's my first time using textio, and I just assumed
some formatting control was provided somewhere,
but that I was too dumb to find it.
Pete
make sure <length> is multiple of 4 if you intend to use it with hwrite.
> It was in the original post, if you missed it:
> std_logic_vector(to_unsigned(sample_val, <length>))
>
> make sure <length> is multiple of 4 if you intend to use it with hwrite.
That worked great.
I shouldn't read / respond to posts at 4 am.
Thanks
Pete