2 dimensional array: slice?

Jens Egerer

unread,

May 26, 1994, 7:40:03 AM5/26/94

to

I have written some VHDL-code, using a 2-dimensional array for a
variable (named u, dimensions (1 to N, 1 to C)). When I try to
assign this to an one-dimensional signal array (named c_u,
dimension (1 to C)) like this:

c_u <= u(i, 1 to C);

I get an errormessage that I can only do it with an onedimensional
array.

MY QUESTION: Is this generally not possible in VHDL, or is just my
compiler a little dumb?

adTHANKSvance

Bye, Jens

--
----------------------------------------------------------------
Jens C. Egerer ege...@rbhp56.rbg.informatik.th-darmstadt.de

Tume Romer

unread,

May 27, 1994, 5:53:25 AM5/27/94

to

According to VHDL:Hardware Description and Design, by Roger Lipsett
Carl Schaefer and Cary Ussery, it is not possible to have a slice of
a multidimensional array.
/Tume
---
=================================================================
Tume Romer KI/EKA/S/UF Phone: +46 8 757 5281

Fax: +46 8 757 4469
e-mail: eka...@hall.ericsson.se MEMO: ERI.EKA.EKATUME

ERICSSON COMPONENTS AB
ASIC Design & Methodology
Isafjordsgatan 16
S-164 81 KISTA , SWEDEN
=================================================================

Guido Schumacher

unread,

May 27, 1994, 4:01:30 AM5/27/94

to

ege...@rbg.informatik.th-darmstadt.de (Jens Egerer) writes:

>I have written some VHDL-code, using a 2-dimensional array for a
>variable (named u, dimensions (1 to N, 1 to C)). When I try to
>assign this to an one-dimensional signal array (named c_u,
>dimension (1 to C)) like this:

>c_u <= u(i, 1 to C);

>I get an errormessage that I can only do it with an onedimensional
>array.

>MY QUESTION: Is this generally not possible in VHDL, or is just my
>compiler a little dumb?

>adTHANKSvance

>Bye, Jens

>Jens C. Egerer ege...@rbhp56.rbg.informatik.th-darmstadt.de

It is not possible in VHDL. An indexed_name as it is used here only allows an expression for each index position, and that expression must be of the type of the corresponding index. (LRM 6.4).
To use a discrete_range is only possible in a slice, but this has to be an one-dimensional array. (LRM 6.5)

Regards, Guido

--
Guido Schumacher
Universitaet Oldenburg

Bert Molenkamp

unread,

May 27, 1994, 3:06:38 AM5/27/94

to

ege...@rbg.informatik.th-darmstadt.de (Jens Egerer) writes:
>
> I have written some VHDL-code, using a 2-dimensional array for a
> variable (named u, dimensions (1 to N, 1 to C)). When I try to
> assign this to an one-dimensional signal array (named c_u,
> dimension (1 to C)) like this:
>
> c_u <= u(i, 1 to C);
>
> I get an errormessage that I can only do it with an onedimensional
> array.
>
> MY QUESTION: Is this generally not possible in VHDL, or is just my
> compiler a little dumb?
>

I think your compiler is not 'dumb' but correctly
implementing the requirements of VHDL.
But you could rewrite your problem, see the following
example.

LRM 1076-1987
" 6.5 Slice Names
....
slice_name ::= prefix ( discrete_range )
The prefix of a slice must be appropriate for a one-dimensional array object. The base type
of this array type is the type of the slice. "

example:
TYPE arr1 IS ARRAY (1 TO 5, 1 TO 6) OF bit;
TYPE ln IS ARRAY (1 TO 6) OF bit;
TYPE arr2 IS ARRAY (1 TO 5) OF ln;
SIGNAL x1 : arr1;
SIGNAL x2 : arr2;
SIGNAL y1,y2 : ln;
BEGIN
y1 <= x1(1,1 TO 6); -- WRONG: since the prefix of the slice is not
-- a one-dimensional arrray
y2 <= x2(1); -- CORRECT;
END c;

Bert Molenkamp
Dept. of Computer Science
University of Twente
PO Box 217
7500 AE Enschede
the Netherlands
email: mole...@cs.utwente.nl

Andy Rushton

unread,

May 29, 1994, 1:51:41 PM5/29/94

to

In article <2s21qj$r...@rs18.hrz.th-darmstadt.de>

ege...@rbg.informatik.th-darmstadt.de (Jens Egerer) writes:
>
>I have written some VHDL-code, using a 2-dimensional array for a

VHDL makes a clear distinction between multi-dimensional arrays and arrays of
arrays. You have a multi-dimensional array which cannot be sliced. To do what
you want to do, either use a for loop and index each element, or redefine your
type to be an array of arrays.

The advantage of using an array of arrays is that you can index a whole row
(the highest dimension), then index that and so on like this: u(x)(y). Also,
since each dimension is just a one-dimensional array, it can be sliced:
u(i)(1 to C).

Incidentally, if you are intending to use synthesis, you will almost certainly
be unable to use multi-dimensional arrays anyway... :-/

Solution 1: for loop

for index in c_u'range loop
c_u(index) <= u(i, index);
end loop;

Solution 2: array of arrays

type one_dim is array (1 to N) of <whatever>;
type two_dim is array (1 to C) of one_dim;
...
variable c_u : one_dim;
variable u : two_dim;
...
c_u <= u(i);

Holger Veit

unread,

Jun 7, 1994, 3:30:10 AM6/7/94

to

LRM Section 6.5 Slice Names
A slice name denotes a one-dimensional array composed of a sequence of
consecutive elements of another one-dimensional array. [...]
slice_name ::= prefix '(' discrete_range ')'
[...]

So your compiler does it quite right.