The new 32-bit version of CUPL allows design entry by schematics,
graphical state diagrams, high-level equations or VHDL and includes
powerful design simulation and partitioning capability. CUPL provides
comprehensive support for many leading programmable device technologies
and manufacturers.
Email in...@euro-eda.com for full details, or visit the "PLD & FPGA
Design Software" page of our web site at http://www.euro-eda.com
--
EuroEDA Limited
Phone: +44 (0)1933 676373
Fax: +44 (0)1933 676372
Email: in...@euro-eda.com
Web: http://www.euro-eda.com
>EuroEDA Limited and Logical Devices Inc. are pleased to announce an
>attractively priced trade-in offer for users of ABEL, MINC or Synario
>wishing to upgrade to V5.0 of [blah, blah] CUPL.
>
>The new 32-bit version of CUPL allows design entry by schematics,
>graphical state diagrams, high-level equations or VHDL and includes
>powerful design simulation and partitioning capability. CUPL provides
>comprehensive support for many leading programmable device technologies
>and manufacturers.
It is of course left as an exercise for the customer to decide
whether CUPL is a better design environment than Synario.
I can't speak for MINC, I don't get on well with ABEL, but
I have some experience of both Synario and CUPL and I thought
perhaps the question was worth asking (;->)
Suggestion: Try before you buy. There's a free version of
CUPL, for TI PLDs only, available via TI's website. I got
it working without any bother, which was not true of the
evaluation copy of CUPL I subsequently asked for. In
fairness, that latter problem might just be a perversity
of WinNT.
Own Opinions Only.
Jonathan Bromley
I don't disagree with the try before you buy suggestion but do look at
the latest product and not an older restricted version.
We offer demonstration CD's of CUPL 5.0 via our web site. The version
you refer to would indeed be fairly limited and is certainly not the
latest 32-bit 95/NT product.
--
Duncan Crowther
EuroEDA Limited
I'll just repeat my personal experience with CUPL, but first some questions for
Euro-EDA:
Why did Stag Programmers stop importing it into the U.K. ?
Why did Microcall stop retailing it in the U.K. ?
In article <fGIc7EA2...@czar.co.uk> in...@euro-eda.com "info" writes:
>
> The new 32-bit version of CUPL allows design entry by schematics,
> graphical state diagrams, high-level equations or VHDL and includes
> powerful design simulation and partitioning capability. CUPL provides
> comprehensive support for many leading programmable device technologies
> and manufacturers.
>
How extensive is the VHDL support, is it the '87 or '93 varient ?
Can it partition a design into two Altera 10k20's ?
What formal agreements do you have with the PLD vendors ?
What predefined LPMs/Logiblox type macros do you supply ?
-any multipliers or counters, for instance ?
Is there in fact any support for hierarchy at all ?
-any ability to call a pre-defined function and pass parameters to it ?
How do you support RAM in Altera Flex or Xylinx 4K devices ?
Can you define counters automatically without the pre-processor defining a
state for EVERY counter value ?
Can you guarantee that every example in your documentation will compile ?
Can you nest the $REPEAT structure ?
Here is my experience, as posted here in May 1998, with comments from an
ex- Logical Devices employee :
Well I am a pissed off ex-employee of Logical Devices, I was a software engineer on
the CUPL package, and here are my views of the Product (Fairly good) and the company
(You will want to read this section).
xxx wrote:
> In article <6jvgs7$ngc$1...@gte1.gte.net> jf...@gte.net "Jim Flanagan" writes:
>
> > I would appreciate anyone's opinion on Logical Device's CUPL software
> > for designing GALS,etc. I'm not a big user of PALs, but from time to
> > time I use one for various projects and have been using the freeware
> > PALASM. I've been thinking of using CUPL (I have the free starter kit)
> > and was curious as to the opinions, good or bad, concerning this tool.
> > Thanks.. Jim
> >
> >
> CUPL is complete bollocks. Here's why (from memory of V4.7 circa 1996) :
> (points 8 to 11 are the killers for serious design)
>
> 1. We ordered Total Designer back in 96. Received 4.6, followed after
> some complaints by 4.7.
You definitely will not get a free update if you don't complain.
> 2. Documentation was crap. Examples in the documentation did not compile.
> Information spread over about 6 different manuals.
You are right, the documentation that was shipped with the product was basically a
collection of 13 manuals, thrown into 6 manuals. The only book you really needed
was the Universal Compiler for Programmable Logic Manual (The big book). While it
was poorly written, it did contain all the information needed to use the program,
and all the common problems people would call me about. (Such as the most common
complaint, the range "bug" ... Range Addr = [addr14..18]; CS = Addr:'h'F --- My
signals are completely removed.)
In version 4.8/4.7 all the examples compiled, as long as you didn't select Best for
Polarity and Quine McClusky, some others needed a option set. The memory management
in the product was terrible. It was designed around a DOS platform and was never
really made it to windows status.
In version 5.0 (I don't know if they have released that one yet...) Everything
compiles with any option. I know because I had the mundane task of doing it. They
may not have fit into the device with some options set, but they did not crash the
compiler
>
>
> 3. Messages when a design had failed to fit were unclear.
If you were targeting a device handled internally, the messages were usually enough
to fix the problem, if you were using a device that required an external fitter,
that is a real pain. It just seems that Silicon Vendors did not design the Fitters
with the thought of connecting them to a Windows Application and receiving error
messages correctly. For the Companies that did design Windows Fitters - other
priorities at LDI prevented implementing the code modifications that would allow
CUPL to call them. But I agree 0011ck - Failed to fit device - is a very bad
message.
> 4. Total Designer was supposed to ship with a device finding utility that
> would find the smallest device that would fit your design. But it would
> only target small pld devices.
We told marketing to remove that claim a long time ago, and we told all of the sales
men to stop selling the package based on that utility (Do either of these
departments ever listen?). The source code for that program was lost before I
started working there. If the user spends 40 hours or so in the setup phase of the
program, he can add all of the variables required to select larger devices. (It just
is not worth it - It is an old DOS based utility)
> 5. Supposed to ship with a partitioner to split large designs to fit into
> small chips. Again, only capable of targetting PLDs
The emergence of CPLD obsoleted this product from a marketing point of view. There
was just no reason to advance this product, but marketing also decided that we still
needed to ship this with the package. Again, the uses can spend about 100 hours to
set up this program to work with CPLDs
> 6 This is despite the CUPL brochure showing fitting to FPGA & CPLD after
> partition. [for what it's worth this is a non issue; who uses
> partitioners when e.g. Altera make it so easy to just step up a family?]
>
Boy I really love a when you need to look in the latest EDN to find out what the
product is supposed to do.
> 7 One of the reasons we brought CUPL was that it claimed to be able to
> target most manufacturer's devices. In practice, you have to design to
> the target macrocell architecture in such detail that you have to choose
> your device family before you begin. No chance of moving from Vantis
> CPLD to Xylinx FPGA when the design gets too big.
>
Not true. You can do it, it just is not efficient. A MACH221 design will fit into
a XC4020 I guarantee it(ha ha) . CUPL is a Sum of Products compiler, not good for
FPGA architecture if you use any advanced functionality of the CUPL language. A
normal 5 PT equation will take one register in a CPLD. In an FPGA it will take up
to 5 times the number of signals on the and term divided by 4 or 5, depending on the
architecture, cells. Of course you can usually rewrite these equations to work with
FPGA architecture, but look at the inability to get windows fitters integrated and
you can wonder how long it will take to actually make these core changes to the
internal data structures of the program.
Going from Atmel ATF1508 to MACH device or Xilinx 95XX you really did not need to
change the code.
> 8. The way you implement counters is very messy; you have to implement a
> state machine with a state for every counter state if you do not want
> to wire it up by hand. This means that a 8 bit counter generates 256
> explicit state declarations after the pre-processor has run. 10 bits is
> the limit - it won't accept more than that.
>
I agree here, at logical the other CUPL software engineer was working on added the
signal = signal +1 for counters, but never finished it.
> 9. No concept of hierarchical design. You can define a few macros and
> include files, but that is it.
>
I don't know how many times I made statements that you NEED this functionality to
compete. But I guess my opinion was not worth the bosses time.
> 10. $REPEAT ... $REPEND cannot be nested.
>
I think this was corrected in version 4.8 but I could be wrong. Stupid me forgot to
steal copies of the software they produced so I can not test it.
> 11. A design of ours with about 10 8 bit counters _always_ crashed the
> compiler with no sensible error message.
>
I don't doubt it ... another one of those fun memory errors.
> 12. We sent back the CUPL package as being "Unfit for Purpose". After
> our lawyers got involved, and the reseller attempted and failed to
> demonstrate correct operation of the software, the reseller accepted
> our position. The reseller subsequently ceased selling the software.
>
You are lucky, if you would of bought it directly from LDI, you never would have
gotten your money back.
> 13. We would have purchased "Keep Current" maintenance. I noticed on their
> web site several months ago that they had recompiled for 32 bit. Even
> those on maintenance were expected to shell out US$ 300 (instead of
> US$ 600) for the upgrade.
>
I never did agree with the bosses idea of how to market software. I do believe if
you had the maintenance, you should get the software free. The end users do not
care that you had to contract outside of the company to find somebody who could
convert the code to 32-bit, and then care even less that the boss personally lead
the development team for the Visual Basic front end.
> 14. The fitters that came with it seemed to be mostly those that you could
> get free or very cheaply from the manufacturers.
>
The were all free from manufacturers. We did not have agreements with any of the
Silicon Vendors.
> 15. I gained the impression, judging from the limitations and the way that
> it was only the front end that seemed to get updated that this is one
> of those cases where the person who wrote and understood the software
> left many years ago, and it is only momentum and marketing b*****t
> that keeps it going.
>
If you are referring to CUPL 5.0 - all of the DLLs went to 32-bit, and the memory
errors are for the most part gone. You can compile a large design, and it may take
10 hours, but it will compile. As far as the front end is concerned. I wish I had
a tap in the office of all the engineers who bought it when they get the Visual
Basic Run-Time Error message. (See below)
> Compare functionally to Altera's MaxPlus, their AHDL language and completly
> wonderful Library of Paramterised Megafunctions. A vastly superior product,
> even if it does tie you into their devices. However they produce a wide range,
> and as I stated above, migrating from one family to another can be as simple as
> changing the device assignment.
>
>
> Let the flame war begin...
>
>
The following is a re-post of what the ex-LD employee stated :
I would just have to say that CUPL is one of the best programs for targeting simple
PAL/GALs, It is all right for targeting CPLDs, and great for creating "Black Boxes"
in larger design where the black box designs contain a State Machine or Look Up
Table. Some people recommend using VHDL for all programmable logic, but there is a
small problem with this approach, it just takes too much time. Several times at
conferences I would give the example of a simple program in VHDL code, and the
corresponding CUPL code. The VHDL code is usually 3-4 pages and the corresponding
CUPL code fit onto one page. Remember here I am referring to Simple GALs and PALs.
VHDL has a place, and under 44 pin devices is not the place.As far as Logical
Devices is concerned >>>>>>>>>> Here is the Flame about the company
The company is run by a self admitted mad man David xxx. He wouldn't let me
implement my ideas about network security, so I copied his personal AOL e-mail to
the X-fer drive. You learn a lot about a person from there personal e-mail. In one
particular e-mail message he tells his mother that he is losing his memory and it is
starting to scare him. In another message he invited a girl from california to
come out to Colorado and she replies that she is only 15 years old, He replies and
says that's OK and makes the offer again.
I took the job at Logical Devices because I had a strong interest in Programmable
Logic, a fairly good Programming Background (Contract work for DOD) and it was an
opportunity to learn. I had dreamed about programming and working with microchip
since I was a kid. I admitted that I did not have never programmed in Windows
before and they said they would train me in that field. I though it was a real
company. This was a dream job. As Waylon Jennins said - 'Wrong'.
The second day of work showed me the anger of Davit Mot. He got involved in a
Yelling match (every other word was f*ck) with the production manager. That
afternoon the PM quit. It only took me about 1 month to have him yelling at me, and
1 more month to yell back using colorful metaphors.
The company started selling UV erasers in the early 80's. They were toy ovens
bought from K-mart with a UV bulb, and a paint job. They were assembled in Miami by
illegal aliens from Cuba. Later David got into the Prom programmer market. And the
company seemed to take off.
When the Allpro 40 was introduced, it was a big hit. Nobody knows why it was
selling like hot cakes, but the company was now a major competitor in the programmer
market. This was the high point of the company. After this point, everything is
down hill. David has delusions of greatness, and thinks he is a King of the empire.
Because of this success he believes that he can do anything a make money.
LDI acquired CUPL from P-Cad and rewrote it generating version 3.0 of CUPL.
Everybody who worked on the program did not know anything about programmable logic
when they started. Most did not even know how to use structured programming
techniques. One of the more famous quotes from the original programmers "What would
a real Flip flop do in this situation ... you know a 7474".
When I started with the company in 1995 there was around 60 employees, only 2 in the
CUPL department. With-in a year the company was down to 30 employees and LDI was
losing money. David would walk in, take you off a project and place you on a new
project, then the next day would yell at you because you were not done with the
first project. I was now in the CUPL development team/Technical Support for
CUPL/Webmaster/Network manager/etc... It was around this time that David decided
that everything that was developed had to be developed using tools and techniques
that he understood. The new standard for programming language was Visual Basic.
All new programmer software and the new CUPL interface would be designed by David
Mot and modifications and hardware connections would be the programmers
responsibility. If David did not understand the circuit or Code that you wrote, you
could not use it (David did not like the underscores ( _ ) in C and therefore you
could not use that language.)
Sales really started dropping due to the lack of advertising and most people who
bought a programmer wanted a refund because they could not use the programmer in
Windows 95. The price David was selling the Allpro 88 at was lower then what it
cost to build it, and 3rd party sales was taking over a majority of the sales
figures. David would not refund anybody because the money was already spent before
the product shipped. The accountant for the company (a engineering student) made a
miscalculation and all of the sudden the company was bouncing checks to everybody.
David ended up selling one of his houses to recover from this error. What does he
expect when he places people who know next to nothing about accounting in the
accounting department. All of David's assets are purchased from Logical Devices
accounts and he doesn't ever pay the taxes on them. Boy the IRS would have fun
auditing that company.
By the middle of 1997, the company was down to 1 real hardware engineer, 2 support
engineers for the programmers, 2 software engineers and 2 techs in the development
side. The engineers were not allowed to talk to the techs. I was told I had to
implement EDIF 3.0.0 in the CUPL software, but David Mot would not allow me to buy
the IEEE documentation for it because we didn't have the money. Finally heard that
almost everyone was getting laid off (And I did not make the essential personal list
this time) so I pretty much dropped everything and started playing games at work for
the next 2 day.
When that day came, David came of with the "Idea that would save the company". He
was going to buy programming Handlers from a company for $60K, and sell them to
programming houses for $150K (If the programming house knew about the Handler
company, they could buy the handler directly from them). I already had a few
interviews set up and couldn't believe the words I was hearing come out of David's
mouth. All other development would stop immediately and everybody would be sales
men in this new department. Monday morning I got into a yelling match with David
and he said maybe it would be better if I wasn't working here anymore and this time
I did not argue, but packed my bags and went to a real job interview.
One engineer at LDI says "We were in the fast food business. Our job is to provide
food for David's Ego, not build products." Another engineer of LDI stated that he
thought the company was a money laundering operation for the first 2 years he was
there.
A work of advice for anybody who considers buying Logical Devices products. Make
sure you purchase it from a Local Sales rep, and make sure that the programmer does
what you need it to do. Do not expect updates, and you will need to go to court if
you want a refund. The products they have are decent, but the business practices
and marketing are not. (Bait and switch is very common there).
Well my rant has lasted long enough. If any other X-employees of LDI read this,
please realize I never had a problem with any other co-worker there so do not take
this personally if you see your quote.
Let the flame war begin...
In article <fGIc7EA2...@czar.co.uk> in...@euro-eda.com "info" writes:
> EuroEDA Limited and Logical Devices Inc. are pleased to announce an
> attractively priced trade-in offer for users of ABEL, MINC or Synario
> wishing to upgrade to V5.0 of the popular, low-cost universal PLD, CPLD
> & FPGA design tool CUPL.
>
> The new 32-bit version of CUPL allows design entry by schematics,
> graphical state diagrams, high-level equations or VHDL and includes
> powerful design simulation and partitioning capability. CUPL provides
> comprehensive support for many leading programmable device technologies
> and manufacturers.
>