Using Xilinx TBUF?

[Thomas Reinemann]

I'm using Xilinx M1 (Syntesys FPGA Express).

I've a shift register and every output must drive some inputs. I want to
avoid a slow slew rate. Is there an explicit possibility to use Xilinx
TBUF?

Bye Tom!

[Joe Gallegos]

Tom

It's been a few months since I've used Xilinx fpgas and the M1
tools...however, I recall a parameter associated with the tbufs and
obufs called 'fast'... This parameter (similar to Altera's turbo bit)
when applied provides the fastest edge/slew output buffers...

I hope this helps

Professionally yours,

Joe

[Rickman]

Joe,
I think you are a little confused about this. The FAST attribute is
applied to EXTERNAL pin outputs. This attribute does not require a
tristate output either. Any general user output can be made FAST.

Tom,
I don't understand the original question. TBUFs are internal devices
used to drive long lines as tristate busses or as wired OR devices.
There is not flexibility in slew rate, nor do they run faster than other
logic (unless you have a very high fan in such as a 16 input mux).

Your description of the shift register does not make it clear what you
are trying to do. Can you provide more detail?

--

Rick Collins

re...@XYusa.net

remove the XY to email me.

[Joe Gallegos]

Rickman wrote:
> Joe,
> I think you are a little confused about this. The FAST attribute is
> applied to EXTERNAL pin outputs. This attribute does not require a
> tristate output either. Any general user output can be made FAST.

You are correct... the fast attribute was applied to outputs only...

Joe