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Capacitor models in verilog

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Paul Richardson

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Oct 25, 2001, 11:13:38 PM10/25/01
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I am putting together a system/board level simulation for work.
I find that I am in need of a capacitor model which acts as your
standard bypass cap and also an AC coupling cap as well. The simulation
itself is all digital, however the caps are present by virtue of the
schematics the netlists are derived from.

Any help is welcome


--
----------
Paul Richardson
paulric...@sbcglobal.net
Oakland, California

raman_narayan

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Oct 26, 2001, 12:33:32 PM10/26/01
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Hi,
If the purpose of the capacitor is charge storage, RC delay you
could use the "trireg" net(with a resistive driver). I am not sure,
if it could serve the purposes that you've mentioned.
Regards
Raman
Paul Richardson <paulric...@sbcglobal.net> wrote in message news:<3BD8AAEB...@sbcglobal.net>...

Paul Richardson

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Oct 26, 2001, 1:38:46 PM10/26/01
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raman_narayan wrote:

Thanks, but in addition to its traditional role as a charge
storage device, I also need it as an AC coupling device as well

John_H

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Oct 26, 2001, 2:16:11 PM10/26/01
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You're looking for the digital simulation with these elements? I know of
Verilog-AMS (Analog and Mixed Signal) but don't think that's what you're
looking for here.

If you have capacitors working "normally" there should be effective shorts
for AC coupling and time delays for any low currents into bulk capacitors.
When you start to diverge from strong digital design methods your
simulation will diverge more from reality because things like switching
thresholds and current drive levels aren't typically maintained to single
digit percentage levels. If your purpose is time delay you might try
modeling the delay with a verilog delay (nanoseconds) or module with
variations for longer delays. Similar comments for AC coupling - there
might be periods of undefined operation where thresholds aren't quite met
as the AC coupling cap establishes its voltage but this is more of a design
dependent issue. Drive currents and switching thresholds just aren't part
of the verilog digital simulation models.

Paul Richardson

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Oct 26, 2001, 2:54:37 PM10/26/01
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John_H wrote:

Thanks, all i need is something that can provide ac coupling as needed

THis is a board level sim so in places where there is ac coupling the
cap should act as a short, when it is a bypass cap it needs to be an
open. I would prefer that it switches automatically

Srinivasan Venkataramanan

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Oct 29, 2001, 4:49:27 AM10/29/01
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Hi,
Check out:

http://www.jmlzone.com/faq/verilog/0019.html

"Paul Richardson" <paulric...@sbcglobal.net> wrote in message

news:3BD986BB...@sbcglobal.net...
<SNIP>

> Thanks, all i need is something that can provide ac coupling as
needed
>
> THis is a board level sim so in places where there is ac coupling
the
> cap should act as a short, when it is a bypass cap it needs to be an
> open. I would prefer that it switches automatically
>

The "bypass" mode is quite easy, so too is the "ac coupling" -
short mode, but the real problem will be "changing this mode
dynamically".


Regards,
Srinivasan
--
Srinivasan Venkataramanan
ASIC Design Engineer
Software & Silicon Systems India Pvt. Ltd. (An Intel company)
Bangalore, India, Visit: http://www.simputer.org)

Andy Peters

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Nov 1, 2001, 5:55:57 PM11/1/01
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Paul Richardson wrote:

> Thanks, all i need is something that can provide ac coupling as needed
>
> THis is a board level sim so in places where there is ac coupling the
> cap should act as a short, when it is a bypass cap it needs to be an
> open. I would prefer that it switches automatically


Perhaps you should use two different models : one for bypass, the other
for AC coupling.


-a

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