defining a string macro from ncverilog command line

[Jason Zheng]

This is a specific question regarding cadence ncverilog. I tried to
define a string macro (e.g. a file name "abc.log") from the command line
options of ncverilog, which is a launcher for the verilog compiler
ncvlog. ncvlog has a command option -DEFINE, and ncverilog has an option
+ncvlogargs+"..." for passing ncvlog options. The issue I seem to be
having is that I can't seem to define string macros this way:

ncverilog +ncvlogargs+'-DEFINE NAME="abc.log"'

The preprocessor seems to strip away the inner quotation automatically.
I doubt this is a shell issue, but I'm using tcsh. Does anyone have a clue?

Here's the test program that I used:

`timescale 1ns / 100ps
module test;
initial
$display (`NAME);

endmodule // test

Thanks in advance.

[sh...@cadence.com]

Trying to pass quotes through a shell and a wrapper can get messy, with
lots of escaping required. I did some experimenting and came up with
something that worked. Using your basic approach, I found it necessary
to escape a backslash to get a backslash to survive to escape the
quotes with:

ncverilog +ncvlogargs+'-DEFINE NAME=\\"abc.log\\"'

There may be a better way of doing it, but I'm not an expert on this.

It was simpler not to use +ncvlogargs to pass the option to ncvlog.
Since the purpose of ncverilog is to handle Verilog-XL command line
options and translate them into options for the NC-Verilog tools, you
can use the Verilog-XL option that defines a macro. This avoids some
quoting and double-escaping:

ncverilog '+define+NAME="abc.log"'

or

ncverilog +define+NAME=\"abc.log\"

[Jason Zheng]

Ahh... I wasn't aware of this option. Much appreciated your help.