I am trying to synthesis a design in Synplify Pro but ever time I do so
I get the following error returned:
Internal error in m_xilinx
Does anyone have any suggestions about a possible cause and/or ideas on
how to fix the problem?
Thank you,
hnjm
Regards,
Srini.
Thank you for the suggestions. I have manged to get my build done; I
think there is some type of corruption in the project file I was
using:- thus used a different project file to point to the same verilog
source. Not sure if this is likely to help anyone else with the same
problem.
Thanks all the same,
hnjm