Source code for content addressable memory with read-write

[Daku]

Could someone please direct me to a working source code example of a
content-addressable memory with read and most importantly - write. Any
hints, suggestions would be of immense help. Thanks in advance.

[d_s_klein]

->> GOOGLE <<-

[schr...@gmail.com]

http://www.asic-world.com/examples/verilog/cam.html

[Gabor]

On 11/27/2012 1:24 PM, schr...@gmail.com wrote:
> http://www.asic-world.com/examples/verilog/cam.html
>
Doesn't look like a CAM to me. It seems to just find the first
one-bit in the input data. This might be a piece of a CAM if the
input data represents a list of matching cells in the CAM.

Also the code seems poorly written. There is no need
for the hold terms. Verilog will automatically hold
the current value of variables if there is no else clause.

Finally I see no reason to make this in two processes rather
than just the one clocked process.

All in all, not what I'd call a noteworthy resource...

Just my 2 cents.

-- Gabor

[Ulf Samuelsson]

Gabor skrev 2012-11-28 04:43:
> On 11/27/2012 1:24 PM, schr...@gmail.com wrote:
>> http://www.asic-world.com/examples/verilog/cam.html
>>
> Doesn't look like a CAM to me. It seems to just find the first
> one-bit in the input data. This might be a piece of a CAM if the
> input data represents a list of matching cells in the CAM.
>

I think I understand what he is trying to do, but it is not working.

This is how I have done this before.
You do a parallel bitserial compare of an incoming bitstream
with an SRAM containing the CAM data.
The SRAM is organized so that word 0 contains bit[0] of all
CAM words. Word 1 contains bit[1] etc.
If you want have a CAM for 48 bit network adresses, and you want
your CAM to handle 1024 possible addresses, you need
an SRAM of 48 words x 1024 bits.

Before you start, you set the found_match (which needs to be a vector
[DEPTH-1:0]) to true for all bits, then during the bit serial compare
you will update this vector, until you have processed all the bits in
the stream.

A bit compare is only true if the bit read from the SRAM is equal to the
current bit of the bitstream, and all previous compares for that CAM
word has been true.

PSEUDO CODE: (Wish I could write like this)

found_match = (others => true);
for (i = 0; i < 48 ; i++) {
wait until (posedge (clk));
for (bit = 0; bit < 1024 ; bit++) {
if (found_match[bit]) {
if (CAM[i][bit] != bitstream) {
found_match[bit] = false;
}
}
}
}
addr = find_first_set(found_match);


If all the CAM words contain unique values, only one comparision
can be true and you can use this in various ways.
Doing a find first set on "found_match" is one possibility, but there
are others.

Best Regards
Ulf Samuelsson.