Display with alignment

[Deepu]

Hi All,

I need some help in displaying decimal numbers with alignment to get
the output below:

[001000] TEST01: 1 TEST02: 1 TEST03: 0 NUMBER
[002000] TEST01: 10 TEST02: 5 TEST03: 1 NUMBER
[003000] TEST01: 150 TEST02: 25 TEST03: 10 NUMBER
[004000] TEST01: 15 TEST02: 2 TEST03: 10 NUMBER

I tried the below code:

$fdisplay(FH,"[%06d] TEST01: %0d TEST02: %0d TEST03: %0d\tNUMBER ");

But i got the output like:

[001000] TEST01: 1 TEST02: 1 TEST03: 0 NUMBER
[002000] TEST01: 10 TEST02: 5 TEST03: 1 NUMBER
[003000] TEST01: 150 TEST02: 25 TEST03: 10 NUMBER
[004000] TEST01: 15 TEST02: 2 TEST03: 10 NUMBER

Thanks for the help

[Jonathan Bromley]

The C-style width formatters like %4d were added to the most
recent version of the (System)Verilog standard, and all the
major tools support them now. I'm surprised you didn't try
this, given that you already used %06d for the first format.

Alternatively you could use an older feature of Verilog.
%d chooses the number of characters based on the maximum
length of the number string. So, for example, if you
display an 8-bit value using %d you will get 3 characters
because the largest possible value is 255. So you can choose
a suitable bit-width, copy the numeric value into a reg of
that width and then display that reg. That technique will
work with older versions of Verilog, and with tools that
don't yet support %3d and suchlike.
--
Jonathan Bromley

[Jonathan Bromley]

On Aug 26, 4:40 am, Deepu <pradeep...@gmail.com> wrote:

> > $fdisplay(FH,"[%06d] TEST01: %0d TEST02: %0d TEST03: %0d\tNUMBER ");

PS: Don't use tabs (\t). They are a complete PITA. They
render differently on different displays and editors,
and (as you saw) their intent is easily broken by
small changes to other parts of the string.
---
Jonathan Bromley

[Deepu]

> The C-style width formatters like %4d were added to the most
> recent version of the (System)Verilog standard, and all the
> major tools support them now.  I'm surprised you didn't try
> this, given that you already used %06d for the first format.
>
> Alternatively you could use an older feature of Verilog.
> %d chooses the number of characters based on the maximum
> length of the number string.  So, for example, if you
> display an 8-bit value using %d you will get 3 characters
> because the largest possible value is 255.  So you can choose
> a suitable bit-width, copy the numeric value into a reg of
> that width and then display that reg.  That technique will
> work with older versions of Verilog, and with tools that
> don't yet support %3d and suchlike.

Hi Jonathan

If i use c like %4d it will add zeros like 0001, 0010, 0150 which i
dont want. Is there a way i can allign the numbers without adding
zeros so that any entry like [001000], TEST01, TEST02, TEST03 and
NUMBER start at the same column?

[001000] TEST01: 10 TEST02: 1 TEST03: 0 NUMBER
[002000] TEST01: 150 TEST02: 10 TEST03: 5 NUMBER

Thanks

[Jonathan Bromley]

On Aug 26, 2:54 pm, Deepu <pradeep...@gmail.com> wrote:
>
> If i use c like %4d it will add zeros like 0001, 0010, 0150

Not for decimal numbers, it doesn't. Hex and binary
get leading zeros, but decimal doesn't. I wonder whether
you actually tried it before telling me that I was wrong?

If you want hex without leading zeros, it's a little harder;
you will need to put the value into a string and manipulate
the string character-by-character to replace the leading
zeros with spaces. Alternatively, write your own
conversion function returning a string result.
--
Jonathan Bromley

[Deepu]

> Not for decimal numbers, it doesn't.  Hex and binary
> get leading zeros, but decimal doesn't.  I wonder whether
> you actually tried it before telling me that I was wrong?
>

Hi Jonathan,

I had %04d because of which i was seeing zeros, using just %4d works
fine.

Thanks..