Any help will be appreciated,
Slawek Grabowski
--
Srinivasan V
IC Design Engineer,
Philips Semiconductors, Eindhoven,
The Netherlands
Slawek Grabowski <sla...@aldec.katowice.pl> wrote in message
news:x78z4.19100$Sf1.4...@news.tpnet.pl...
> Hello,
> Does anyone know how to write a ROM initialized form Intel Hex file ?
> Is it possible in Verilog ?
>
As far as I know the answer is NO, BUT I achieved this in my last
project via a
conversion routine (I am sorry that I don't have that routine with me any
more...), basically
Verilog expects the ROM data to be in so called "Verilog Format" which loks
like
@<address> <data>
@<address> <data>
@<address> <data>
....
And Verilog code reads it with system tasks "$readmemh" and/or "$readmemb".
Where <address> and <data> could be either in binary or hex (Corect me if I
am
wrong here) depending on whether you use "$readmemb" or "$readmemh"
Now once you get hold of the format of "Intel Hex" I believe it is straight
forward to convert
the same.
Good Luck.
Srini
Regards,
Slawek Grabowski
Srinivasan Venkataramanan <venkataraman...@philips.com> wrote in
message news:FrDtI...@natlab.research.philips.com...
Thanks
M
Sent via Deja.com http://www.deja.com/
Before you buy.
In verilog a backslash introduces a variable name that might include
special characters (like '[' or '/' for example') this allows
you to pull in names from outside verilog that have different syntaxes
that might clash with normal verilog naming conventions - such names are always terminated
with a space for example:
\abcd[1] - a net called 'abcd[1]'
abcd[1] - bit 1 of 'abcd'
\abcd [1] - bit 1 of 'abcd'
\abcd[1] [1] - bit 1 of 'abcd[1]'
Paul Campbell