Timing check off with verilog NCSIM ? URGENT !!!!
Emmanuel Poirier
I would like disable a timing check in a post synthesis simulation with
NCSIM.
How can i do this ?
IIn VHDL i pass generc parameter but in verilog.
thx
Alexander Gnusin
Disabling timing checks is done during elaboration stage.
Use switch -NOTIMINGCHECKS with ncelab or run : ncelab -help | grep timing
for more timing options.
Regards,
Alexander
Martyn Pollard
news:3e661840$0$4999$4d4e...@read.news.fr.uu.net...
It is possible to disable specific timing checks in the design. All the
information you need is in cdsdoc documentation. Search for "timing file".
You can turn off timing in specific parts of a Verilog design by using a
timing file, which you specify on the command line with the -tfile option.
For example,
% ncelab -tfile myfile.tfile worklib.top:module
If you are running NC-Verilog in single-step invocation mode, use the
+nctfile+ option. For example,
% ncverilog +nctfile+myfile.tfile source_files
Example tfile.
// Disable timing checks in top.foo
PATH top.foo -tcheck
// Disable timing checks in all scopes below top.foo
PATH top.foo... -tcheck
Steven Sharp
> I would like disable a timing check in a post synthesis simulation with
> NCSIM.
> How can i do this ?
If you want to turn off all timing checks, there are command line
options for this in ncelab. This is generally done for simulation
speed.
However, I suspect you want to turn off one particular timing check that
is producing a lot of spurious warnings (e.g. a synchronizer flop where
you have already resolved the metastability issues).
For this purpose there is a built-in system task that was originally
provided in Verilog-XL and I think is also supported in NC-Verilog.
It is called $disable_warnings, and it doesn't actually turn off the
timing checks, just the warning messages. It can be used to turn off
trireg decay warnings and/or timing check warnings, and can be applied
to the entire design or to particular module instances (and any
hierarchy under them). To turn off the timing check warnings in module
instance top.foo.flop, you would use the system task call
$disable_warnings("timing", top.foo.flop);
If you need to turn off the timing check completely, because a
notifier from it is making your flop go to X whenever it fires,
this won't work. I think the usual solution for this is to use a
special module for synchronizer flops, which doesn't have the timing
checks.
Another approach would be to create an SDF annotation file that
sets the timing check limits for this timing check to zero.
Srinivasan Venkataramanan
"Steven Sharp" <sh...@cadence.com> wrote in message
news:3a8e124e.03030...@posting.google.com...
> "Emmanuel Poirier" <epoi...@scmmicro.fr> wrote in message
news:<3e661840$0$4999$4d4e...@read.news.fr.uu.net>...
>
> > I would like disable a timing check in a post synthesis simulation with
> > NCSIM.
> > How can i do this ?
>
<SNIP>
> If you need to turn off the timing check completely, because a
> notifier from it is making your flop go to X whenever it fires,
> this won't work. I think the usual solution for this is to use a
> special module for synchronizer flops, which doesn't have the timing
> checks.
How about -no_notifier option with ncelab (+no_notifier with ncverilog)
for this?
>
> Another approach would be to create an SDF annotation file that
> sets the timing check limits for this timing check to zero.
Srinivasan
--
Srinivasan Venkataramanan
Senior Verification Engineer
Software & Silicon Systems India Pvt Ltd. - an Intel company
Bangalore, India
I don't speak for Intel
Steven Sharp
>
> How about -no_notifier option with ncelab (+no_notifier with ncverilog)
> for this?
Yes, that would turn them off everywhere in the design (though I think
the option is -nonotifier, without the underscore). But I am guessing
the goal here was to turn off one particular instance.
A solution to this would be to set this particular notifier to a
Z value, which prevents the timing check from toggling it any more.
Or if you don't trust this feature for some reason, use a force
statement on it to prevent it from toggling.
The combination of $disable_warnings("timing", <instance name>) and
<instance name>.notifier_name = 1'bz; in an initial block somewhere
should fully disable the effects of the timing check. Or use an
SDF annotation or a timing file, as was suggested elsewhere.