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Verilog Syntax Check

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Steve Wang

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May 15, 2003, 2:11:28 PM5/15/03
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Hi,

Anyone knows what kind of software we can use to check the RTL code
for synopsys syntax error?
Thanks


Steve

Srinivasan Venkataramanan

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May 16, 2003, 12:19:54 AM5/16/03
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Hi Steve,
Not sure if I understand you correctly, any decent Verilog
compiler/parser should do Verilog Syntax check. If you are looking for
Synopsys specific (Synthesisable) checks, you may want to look for Lint
tools such as Verilint, NOVAS RTL Explorer etc.

HTH,
Srinivasan

--
Srinivasan Venkataramanan
Senior Verification Engineer
Software & Silicon Systems India Pvt Ltd. - an Intel company
Bangalore, India

http://www.noveldv.com http://www.deeps.org

I don't speak for Intel
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Jon Beniston

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May 19, 2003, 7:26:41 PM5/19/03
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"Steve Wang" <sw...@actrans-inc.com> wrote in message
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Sure, try a synthesis tool such as Design Compiler.

Cheers,
JonB


Tom Verbeure

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May 27, 2003, 6:27:44 PM5/27/03
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Hello Steve,

A tool that I use at work it SpyGlass from Atrenta. We have the VHDL
checker, but it also supports Verilog. It's an extermely powerful linting
tool that basically synthesizes the code to an internal format on which it
then performs every check you can imagine. (RTL code check, combinational
loops, testability issues, ...) There are endless configuration options.
I found it to be very useful once it's configured correctly. It's quite
expensive though.

Tom


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Steve Wang

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May 27, 2003, 9:17:47 PM5/27/03
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HI,

Thanks for the respond, is there any chaper tools can do this job.


Steve

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Srinivasan Venkataramanan

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May 28, 2003, 2:20:25 AM5/28/03
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Steve,
HDL Lint from Veritools is a cheaper alternative, though I personally
haven't used it yet. See:

http://www.veritools-web.com/undertowsuite.shtml

Also there were quite a few threads on Lint tools in ESNUG, one quick search
yielded http://www.deepchip.com/items/0403-05.html

Visit deepchip.com and do a search for Lint.

HTH,
Srinivasan

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