Active low?
Martin E.
designator in a schematic/data sheet)?
I've resorted to appending "_L" to designators but would like to find out if
a real standard exists.
Example: sdram0_ras_L
Thank you,
--
Martin E.
To send private email:
0_0_...@pacbell.net
where
"0_0_0_0_" = "martineu"
Jon Beniston
> What is the notational convention to denote an active-low signal (a barred
> designator in a schematic/data sheet)?
>
> I've resorted to appending "_L" to designators but would like to find out if
> a real standard exists.
> Example: sdram0_ras_L
>
> Thank you,
>
Like all standards, there are many.
Cheers,
JonB
VhdlCohen
Most common notation is _n for negative.
Other notations are _f for false, and _L for low.
I like _n
------------------------------------------------------------------------
Ben Cohen Publisher, Trainer, Consultant (310) 721-4830
http://www.vhdlcohen.com/ vhdl...@aol.com
Author of following textbooks:
* Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn
0-9705394-2-8
* Component Design by Example ", 2001 isbn 0-9705394-0-1
* VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1
* VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115
------------------------------------------------------------------------------
Rick Filipkiewicz
"Martin E." wrote:
> What is the notational convention to denote an active-low signal (a barred
> designator in a schematic/data sheet)?
>
> I've resorted to appending "_L" to designators but would like to find out if
> a real standard exists.
> Example: sdram0_ras_L
>
> Thank you,
>
> --
> Martin E.
>
I use that sort of convention but I've often thought it should be something like
n_<real sig name>
then ... if(!n_foo)... beomes an obvious "foo is asserted" statement.
Of course once away from the IO pins there's no point in maintaining active low
signals is there ?
Anthony J Bybell
> Of course once away from the IO pins there's no point in maintaining active
> low signals is there ?
...actually, it depends. If your methodology doesn't optimize gates
across module or unit boundaries outside of an occasional redrive
buffer, it might be advantageous to move an inverter to module A if
module B always inverts it before it's used:
A: assign a_output = x & y;
B: assign usage = ~a_output ...
Considering that CMOS circuits are inverted, you can chop out two
inverter delays with the above in the best case by doing this:
A: assign a_output_Z = ~ (x & y);
B: assign usage = a_output_Z ...
As with everything, YMMV and a lot depends on what synthesis chews
your circuit into: e.g., I've seen cases where AOs are actually
*faster* than AOIs due to how they were implemented in the circuit
library. Try de morgan's theorem in order to make the critical path
the shortest then draw out the resultant circuit. (It might've been
OA vs OAI but I don't remember..it was something like that.)
Oh, the fun of pouring over endpoint reports...
-t
Muthu
> What is the notational convention to denote an active-low signal (a barred
> designator in a schematic/data sheet)?
>
> I've resorted to appending "_L" to designators but would like to find out if
> a real standard exists.
> Example: sdram0_ras_L
>
> Thank you,
i prefer to use like this:
rst_n;
to indicate reset is active low....
Robert Szczygiel
>
> What is the notational convention to denote an active-low signal (a barred
> designator in a schematic/data sheet)?
I am not aware of any "official" standards.
Personally I use *_B for signals active low, and *_p - *_n for
differential.
Robert
jok
The trailing attribute for active low signals was '_n' during the time when
LSI LOGIC established/educated the masses designing chips. Actually, there
may not have been a _, just n.
In any event, the 'n' trailing attribute does not play well with
mixed-signal, as pointed out by Robert.
Thus, the important lesson is to establish guidelines within your design
group and follow these guidelines.
Then, everyone is on same page.
Cheers,
JJ
"Robert Szczygiel" <Robert.S...@cern.ch> wrote in message
news:3C8615AC...@cern.ch...