MuP21 Instruction Set
SagaLore
load, store, loadp, storep, lit
com, xor, and, add, shl, shr, addnz
loada, storea, dup, drop, over, nop
Can someone briefly tell me what each of these instructions do?
jf...@ricochet.net
"SagaLore" <saga...@ptd.net> wrote:
> Can someone briefly tell me what each of these instructions do?
branching instructions take a 10 bit inlined on page argument
jump= replace lower 10 bits of PC with inlined argument
call= push PC to return stack, and jump
jz= jump if top of stack=0 (not including carry) (T0)
jcz= jump if carry bit not set (C0)
ret= return, move top of return stack to PC
loada= move top of stack to A register (A)
storea= copy A register to top of stack (!A)
load= move contents of memory address by A to top of stack (@)
store= move constents of top of stack to memory addressed by A (!)
loadp= move contents of memory address by A to T, increment A (@+)
storep= move constents of Tto memory addressed by A, increment A (!+)
lit= copy contents of following cell to T, move PC past literal (#)
logic
and= logical and T and S to make a new T, remove S
xor= logical xor T and S to make a new T, remove S
com= invert all bits in T (including carry)
math
add= add T and S, put result in T and remove S (+)
shl= shift T left 1 bit including the carry bit (2*)
shr= shift 20 bits of T right, T.20 and T.19 unchanged (2/)
addnz= conditionaly add T to S place result in T but (+n)
not drop S if and only if T.0 is true
stack operations (on stack operations the bottom 4 stack cells wrap)
dup=duplicate T on stack
drop= remove T from stack
over= place copy of S above T and S on stack
(you left out)
push= move top of data stack to top of return stack (>R)
pop= move top of return stack to top of data stack (R>)
no operation instruction
nop= delay 10ns
If you have any questions you can download the S21
simulator and single step through instructions while
watching the contents of all the registers. You can
also read the online documentation for the assembler
in P21Forth. There is even a copy of P21Forth that
runs on the simulator so you can run ANS Forth programs
in the simulator. (if you are very patient, it is
thousands of times slower than a real chip)
The instructions were given one set of names by Chuck
and two sets of names by Dr. Ting. This set of names
was supposed to be obvious to people familar with
conventional assembler. I prefer the set that look
like Forth. Chuck used a set of shorter names in
his assemler in OKAD because of the screen layout. He
has gone back to more Forth like names in Color Forth.
--
Jeff Fox UltraTechnology
www.UltraTechnology.com
Sent via Deja.com http://www.deja.com/
Before you buy.
Andreas Kochenburger
>jump, call, ret, jz, jcz
>load, store, loadp, storep, lit
>com, xor, and, add, shl, shr, addnz
>loada, storea, dup, drop, over, nop
>
>Can someone briefly tell me what each of these instructions do?
jump might hop
call might shout
addnz might add nonzenz
:-)
SagaLore
I know what a stack and register does, what I want to know is how it
functions electronically. Which one is faster, which one is more expensive.
jf...@ricochet.net wrote in message <7sg5kk$7nh$1...@nnrp1.deja.com>...
>In article <H9DG3.1784$JM3....@nnrp1.ptd.net>,
> "SagaLore" <saga...@ptd.net> wrote:
>
>> Can someone briefly tell me what each of these instructions do?
>
jf...@ricochet.net
That is a very involved question and can't be answered simply.
Stacks can be implemented many ways. A stack can be a simple
FILO queue. It can be an array in memory or a set of onchip
registers. It can be a combination of a set of onchip
registers and an array in memory. (*1) Those are the most
common implementation of stacks. But people also implement
stacks as a class of objects in OOP and there is almost no
limit to the variations possible of how stacks can be done.
> I know what a stack and register does, what I want to know is how it
> functions electronically.
No only are there many ways to implement a stack, there are
nearly infinite ways to get it to function electroncially. One
might say that every implemention in unique at the gate level.
It is unreasonable to expect anyone to explain all the detail of
one implemention let alone all possible implementations.
>Which one is faster, which one is more expensive.
It is not that simple. The general rule is that onchip
access is faster than off chip access so on chip general
purpose registers or stack registers are faster than memory
access. So stacks in memory must run at memory speeds.
One of the features of stack machines is zero operand access.
The top of stack is the implied destination of operations
just as in Forth. In a general purpose register based machine
you have fast access to registers. With that comes the need
to address the source and destination registers. This brings
register addressing operands into the instructions. The
size of these arguments in the instruction field is very
processor and architicture specific but the difference between
5 bit MISC instructions and 32 bit RISC instructions is striking.
When instructions are six times bigger this means more transistors
to get them, more transistors to decode them, and more memory
to hold them. There is expense associated with that. As Phil
Koopman points out in his online book on Stack Computers
( http://www.cs.cmu.edu/~koopman/stack_computers/index.html )
the size of the entire program for a stack computer may be the
size of the cache required for that program by a RISC machine
for the same program. RISC or CISC have a different balance
of resources than what is seen in a zero operand architectures.
(*1) this is the most common technique in most Forth
implementations from what I have seen. Most processors
have some registers available and some instructions that
were designed to do stacks in memory.
However architectural variations are nearly endless. Some
machines can address a large set of registers in the same
way they address memory. Some machines have register
windows etc.
William Tanksley
>What is a "stack", as compared to a set of registers?
A stack architecture has a stack in place of a register file, right?
A register file is a bunch of registers tied together with a huge MUX.
This MUX lets you choose which register you want to read or write.
A stack, on the other hand, always reads or writes from the top element.
It's not necessary to access anything below that (by the definition of a
stack). Therefore, there's no need for the single huge MUX.
I built my stack using a set of registers lined up, with each register
connected to the one before it and the one after it. There was a 'POP'
control and a 'PUSH' control running to each stack register; when POP was
held high every register in the stack would replace its value with the
value of the register underneath it. PUSH would do the same for the
register above it.
I also had a seperate TOS register, so that I could always see two items
(if I'd only used the stack, I could only see one item). The ALU was
hooked directly up to the top two items.
>I know what a stack and register does, what I want to know is how it
>functions electronically. Which one is faster, which one is more expensive.
Hard to say. The stack is faster because its transistors operate in
parallel; I think the register file is cheaper, because its cost grows
logarithmicly with its number of registers, while the stack grows
linearly. But the cost is very small for both; you'd be better off
considering the rest of the architecture.
--
-William "Billy" Tanksley