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I will make my way of thinking more clear...

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Ramine

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May 10, 2016, 9:29:47 PM5/10/16
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Hello,

I have wrote this:

>I think a variable to be visible needs a full memory barrier,
>this is why the windows function FlushProcessWriteBuffers() is needed
>in the writer side of my scalable Asymmetric reader-writer mutex
>algorithms.

And Chris Vin responded to me this:

>You have got that wrong as well. I doubt a full memory barrier is
>required. Acquire/release is almost certainly adequate (which also
>makes volatile irrelevant).

>I would be very surprised if this doesn't affect all your code in other
>ways, because your posting shows that you don't understand the basics
>and are therefore clueless.


I think that Chris Vine doesn't understand my way of thinking,
your way of thinking is an optimization way of thinking that is
error prone, but me, i am adopting the ADA and the Spark
way of thinking and using a Full memory barrier to
reduce the risk of errors, on x86 an Mfence is 400 CPU cycles
and an Sfence is 200 CPU cycles , so to be more safe we can
also always use an Mfence and that's not a big difference i think.


Thank you,
Amine Moulay Ramdane.



Ramine

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May 10, 2016, 9:37:53 PM5/10/16
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Hello,

I am speaking from a Delphi and FreePascal point of view,
because i am compiling my Dynamic Link Libraries with
FreePascal or Delphi and using them in C++.



Thank you,
Amine Moulay Ramdane.


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