On 12/27/2022 2:09 PM, Michael S wrote:
> On Tuesday, December 27, 2022 at 11:31:33 PM UTC+2, Chris M. Thomasson wrote:
>> On 12/27/2022 3:42 AM, Michael S wrote:
>>> On Monday, December 26, 2022 at 11:23:06 PM UTC+2, Chris M. Thomasson wrote:
>>>> Imagine you are on a SPARC in RMO mode, you are programming in assembly
>>> If I am not mistaken, SPARC RMO is paper spec that was never implemented
>>> in hardware. Which does not mean that it is impossible to imagine that I am
>>> programming it in assembler, but it takes stronger imagination than I posses.
>> SPARC RMO is a real thing.
>> "Solaris on SPARC uses total-store order (TSO); however, Linux runs
>> SPARC in relaxed-memory order (RMO) mode."
> I am pretty sure that the article got it wrong.
> OS can set control bits in register to any value it wishes, but the underlying
> hardware will still behave as TSO.
> At least, if the hardware is made by Sun/Oracle or Fujitsu, but all other SPARC
> CPU vendors became irrelevant since ~1996, anyway.