On Tue, 10 May 2016 15:18:04 -0700
Ramine <ramine@1.1> wrote:
> I have just updated my C++ synchronization objects library,
> i have made some variables "volatile" in my scalable Asymmetric
> Distributed Read-Writer Mutex algorithms, to be sure of visibility
> accross cores, so now you can be more confident.
What about "Other than that i will quit this group and let you now do
your job of discussing matters of C++."
That didn't last wrong.
Your basic problem is that you are clueless. Your posts are unmitigated
rubbish and I cannot imagine anyone wanting to use your code seriously
(even you know your code is rubbish because it seems that nearly every
day you post a succession of new message about how you have had to
change it again because of some new perceived issue).
You have completely misunderstood 'volatile' in C and C++, and the
meaning of the article to which you earlier referred about it. Clearly,
it is a minimum condition for a variable to be visible to all cores
that it should not be a register variable. From that, you assume that
avoiding registers (say, by using 'volatile' on Intel) will _make_ the
variable visible to all cores. _Making_ a variable visible to all cores
requires synchronisation, which 'volatile' doesn't do (the article to
which you referred does subsequently discuss Java 'volatile' for the
purpose, which is another kettle of fish and does synchronise).
In any event, you seem completely unaware of the C11 and C++11 memory
models. You are such a twit that you may also be confusing sequential
consistency with cache coherency (Intel is naturally cache coherent),
but it is difficult to tell.
Until you have actually acquired some relevant knowledge and can post
without showing you are an idiot, why not just shut up?